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[mips] Move some structures represent MIPS specific ELF sections from LLD to LLVM
That allows to reuse the code in other tools like llvm-readobj etc. No functional changes. llvm-svn: 238188
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@ -489,6 +489,43 @@ struct Elf_Phdr_Impl<ELFType<TargetEndianness, MaxAlign, true> > {
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Elf_Xword p_align; // Segment alignment constraint
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};
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// MIPS .reginfo section
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template <class ELFT>
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struct Elf_Mips_RegInfo;
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template <llvm::support::endianness TargetEndianness, std::size_t MaxAlign>
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struct Elf_Mips_RegInfo<ELFType<TargetEndianness, MaxAlign, false>> {
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LLVM_ELF_IMPORT_TYPES(TargetEndianness, MaxAlign, false)
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Elf_Word ri_gprmask; // bit-mask of used general registers
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Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers
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Elf_Addr ri_gp_value; // gp register value
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};
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template <llvm::support::endianness TargetEndianness, std::size_t MaxAlign>
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struct Elf_Mips_RegInfo<ELFType<TargetEndianness, MaxAlign, true>> {
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LLVM_ELF_IMPORT_TYPES(TargetEndianness, MaxAlign, true)
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Elf_Word ri_gprmask; // bit-mask of used general registers
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Elf_Word ri_pad; // unused padding field
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Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers
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Elf_Addr ri_gp_value; // gp register value
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};
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// .MIPS.options section
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template <class ELFT> struct Elf_Mips_Options {
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LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
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uint8_t kind; // Determines interpretation of variable part of descriptor
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uint8_t size; // Byte size of descriptor, including this header
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Elf_Half section; // Section header index of section affected,
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// or 0 for global options
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Elf_Word info; // Kind-specific information
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const Elf_Mips_RegInfo<ELFT> &getRegInfo() const {
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assert(kind == llvm::ELF::ODK_REGINFO);
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return *reinterpret_cast<const Elf_Mips_RegInfo<ELFT> *>(
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(const uint8_t *)this + sizeof(Elf_Mips_Options));
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}
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};
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// .MIPS.abiflags section content
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template <class ELFT> struct Elf_Mips_ABIFlags {
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LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
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