RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 02:52:53 +02:00
Code Issues Projects Releases Wiki Activity

[DAGCombiner] Fix SDLoc in a (sext (sextload x)) combine (3/N)

Browse Source 
Prior to this patch, for the given test case, we would apply the
location associated with the sdiv instruction to instructions which
perform the load.

Part of: llvm.org/PR37262.

Differential Revision: https://reviews.llvm.org/D46222

llvm-svn: 331302
This commit is contained in:
Vedant Kumar 2018-05-01 19:51:15 +00:00
parent 52a2895e1d
commit 12a928f1e0
2 changed files with 41 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -7817,9 +7817,9 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
EVT MemVT = LN0->getMemoryVT();
if ((!LegalOperations && !LN0->isVolatile()) ||
TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, MemVT)) {
SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, DL, VT, LN0->getChain(),
LN0->getBasePtr(), MemVT,
LN0->getMemOperand());
SDValue ExtLoad =
DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(LN0), VT, LN0->getChain(),
LN0->getBasePtr(), MemVT, LN0->getMemOperand());
CombineTo(N, ExtLoad);
DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), ExtLoad.getValue(1));
return SDValue(N, 0); // Return N so it doesn't get rechecked!

38
test/CodeGen/ARM/fold-sext-sextload.ll Normal file
View File

@ -0,0 +1,38 @@
; RUN: llc -mtriple armv7 %s -stop-before=livedebugvalues -o - | FileCheck %s
define <4 x i8> @i(<4 x i8>*) !dbg !8 {
%2 = load <4 x i8>, <4 x i8>* %0, align 4, !dbg !14
; CHECK: $[[reg:.*]] = VLD1LNd32 {{.*}} debug-location !14 :: (load 4 from %ir.0)
; CHECK-NEXT: VMOVLsv8i16 {{.*}} $[[reg]], {{.*}} debug-location !14
; CHECK-NEXT: VMOVLsv4i32 {{.*}} $[[reg]], {{.*}} debug-location !14
%3 = sdiv <4 x i8> zeroinitializer, %2, !dbg !15
call void @llvm.dbg.value(metadata <4 x i8> %2, metadata !11, metadata !DIExpression()), !dbg !14
call void @llvm.dbg.value(metadata <4 x i8> %3, metadata !13, metadata !DIExpression()), !dbg !15
ret <4 x i8> %3, !dbg !16
}
declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.debugify = !{!0, !1, !2, !3}
!llvm.module.flags = !{!4}
!llvm.dbg.cu = !{!5}
!0 = !{i32 24}
!1 = !{i32 19}
!2 = !{i32 3}
!3 = !{i32 2}
!4 = !{i32 2, !"Debug Info Version", i32 3}
!5 = distinct !DICompileUnit(language: DW_LANG_C, file: !6, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !7)
!6 = !DIFile(filename: "/Users/vsk/Desktop/test.ll", directory: "/")
!7 = !{}
!8 = distinct !DISubprogram(name: "i", linkageName: "i", scope: null, file: !6, line: 1, type: !9, isLocal: false, isDefinition: true, scopeLine: 1, isOptimized: true, unit: !5, variables: !10)
!9 = !DISubroutineType(types: !7)
!10 = !{!11, !13}
!11 = !DILocalVariable(name: "1", scope: !8, file: !6, line: 1, type: !12)
!12 = !DIBasicType(name: "ty32", size: 32, encoding: DW_ATE_unsigned)
!13 = !DILocalVariable(name: "2", scope: !8, file: !6, line: 2, type: !12)
!14 = !DILocation(line: 1, column: 1, scope: !8)
!15 = !DILocation(line: 2, column: 1, scope: !8)
!16 = !DILocation(line: 3, column: 1, scope: !8)
!17 = !{i32 2, !"Debug Info Version", i32 3}