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[x86] add restriction for lowering to vpermps
This transform was added with rL351346, and we had an escape for shufps, but we also want one for unpckps vs. vpermps because vpermps doesn't take an immediate shuffle index operand. llvm-svn: 352333
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@ -9719,6 +9719,21 @@ static bool isUnpackWdShuffleMask(ArrayRef<int> Mask, MVT VT) {
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return IsUnpackwdMask;
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}
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static bool is128BitUnpackShuffleMask(ArrayRef<int> Mask) {
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// Create 128-bit vector type based on mask size.
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MVT EltVT = MVT::getIntegerVT(128 / Mask.size());
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MVT VT = MVT::getVectorVT(EltVT, Mask.size());
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// Match any of unary/binary or low/high.
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for (unsigned i = 0; i != 4; ++i) {
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SmallVector<int, 16> UnpackMask;
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createUnpackShuffleMask(VT, UnpackMask, (i >> 1) % 2, i % 2);
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if (isTargetShuffleEquivalent(Mask, UnpackMask))
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return true;
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}
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return false;
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}
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/// Get a 4-lane 8-bit shuffle immediate for a mask.
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///
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/// This helper function produces an 8-bit shuffle immediate corresponding to
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@ -11709,8 +11724,10 @@ static SDValue lowerShuffleOfExtractsAsVperm(const SDLoc &DL, SDValue N0,
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return SDValue();
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// Final bailout: if the mask is simple, we are better off using an extract
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// and a simple narrow shuffle.
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if (NumElts == 4 && isSingleSHUFPSMask(NewMask))
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// and a simple narrow shuffle. Prefer extract+unpack(h/l)ps to vpermps
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// because that avoids a constant load from memory.
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if (NumElts == 4 &&
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(isSingleSHUFPSMask(NewMask) || is128BitUnpackShuffleMask(NewMask)))
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return SDValue();
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// Extend the shuffle mask with undef elements.
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@ -45,23 +45,15 @@ define <2 x double> @unpckh_unary_extracted_v8f64(<4 x double> %x) {
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ret <2 x double> %r
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}
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; FIXME: vpermps requires a constant load for the index op. It's unlikely to be profitable.
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; vpermps requires a constant load for the index op. It's unlikely to be profitable.
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define <4 x i32> @unpckh_unary_extracted_v8i32(<8 x i32> %x) {
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; AVX1-LABEL: unpckh_unary_extracted_v8i32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2OR512VL-LABEL: unpckh_unary_extracted_v8i32:
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; AVX2OR512VL: # %bb.0:
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; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <2,6,3,7,u,u,u,u>
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; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; AVX2OR512VL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
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; AVX2OR512VL-NEXT: vzeroupper
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; AVX2OR512VL-NEXT: retq
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; ALL-LABEL: unpckh_unary_extracted_v8i32:
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; ALL: # %bb.0:
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; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
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; ALL-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; ALL-NEXT: vzeroupper
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; ALL-NEXT: retq
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%extrl = shufflevector <8 x i32> %x, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%extrh = shufflevector <8 x i32> %x, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%r = shufflevector <4 x i32> %extrl, <4 x i32> %extrh, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
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@ -69,20 +61,12 @@ define <4 x i32> @unpckh_unary_extracted_v8i32(<8 x i32> %x) {
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}
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define <4 x float> @unpckh_unary_extracted_v8f32(<8 x float> %x) {
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; AVX1-LABEL: unpckh_unary_extracted_v8f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2OR512VL-LABEL: unpckh_unary_extracted_v8f32:
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; AVX2OR512VL: # %bb.0:
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; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <2,6,3,7,u,u,u,u>
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; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; AVX2OR512VL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
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; AVX2OR512VL-NEXT: vzeroupper
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; AVX2OR512VL-NEXT: retq
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; ALL-LABEL: unpckh_unary_extracted_v8f32:
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; ALL: # %bb.0:
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; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
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; ALL-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; ALL-NEXT: vzeroupper
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; ALL-NEXT: retq
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%extrl = shufflevector <8 x float> %x, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%extrh = shufflevector <8 x float> %x, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%r = shufflevector <4 x float> %extrl, <4 x float> %extrh, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
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@ -169,23 +153,15 @@ define <2 x double> @unpckl_unary_extracted_v8f64(<4 x double> %x) {
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ret <2 x double> %r
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}
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; FIXME: vpermps requires a constant load for the index op. It's unlikely to be profitable.
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; vpermps requires a constant load for the index op. It's unlikely to be profitable.
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define <4 x i32> @unpckl_unary_extracted_v8i32(<8 x i32> %x) {
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; AVX1-LABEL: unpckl_unary_extracted_v8i32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2OR512VL-LABEL: unpckl_unary_extracted_v8i32:
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; AVX2OR512VL: # %bb.0:
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; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <0,4,1,5,u,u,u,u>
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; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; AVX2OR512VL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
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; AVX2OR512VL-NEXT: vzeroupper
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; AVX2OR512VL-NEXT: retq
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; ALL-LABEL: unpckl_unary_extracted_v8i32:
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; ALL: # %bb.0:
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; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
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; ALL-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; ALL-NEXT: vzeroupper
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; ALL-NEXT: retq
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%extrl = shufflevector <8 x i32> %x, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%extrh = shufflevector <8 x i32> %x, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%r = shufflevector <4 x i32> %extrl, <4 x i32> %extrh, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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@ -193,20 +169,12 @@ define <4 x i32> @unpckl_unary_extracted_v8i32(<8 x i32> %x) {
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}
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define <4 x float> @unpckl_unary_extracted_v8f32(<8 x float> %x) {
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; AVX1-LABEL: unpckl_unary_extracted_v8f32:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
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; AVX1-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; AVX1-NEXT: vzeroupper
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; AVX1-NEXT: retq
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;
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; AVX2OR512VL-LABEL: unpckl_unary_extracted_v8f32:
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; AVX2OR512VL: # %bb.0:
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; AVX2OR512VL-NEXT: vmovaps {{.*#+}} ymm1 = <0,4,1,5,u,u,u,u>
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; AVX2OR512VL-NEXT: vpermps %ymm0, %ymm1, %ymm0
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; AVX2OR512VL-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
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; AVX2OR512VL-NEXT: vzeroupper
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; AVX2OR512VL-NEXT: retq
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; ALL-LABEL: unpckl_unary_extracted_v8f32:
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; ALL: # %bb.0:
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; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
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; ALL-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; ALL-NEXT: vzeroupper
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; ALL-NEXT: retq
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%extrl = shufflevector <8 x float> %x, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%extrh = shufflevector <8 x float> %x, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%r = shufflevector <4 x float> %extrl, <4 x float> %extrh, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
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