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[TargetLowering] SimplifyDemandedBits ISD::SRA multi-use handling

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Call SimplifyMultipleUseDemandedBits to peek through extended source args with multiple uses
This commit is contained in:
Simon Pilgrim 2020-01-21 15:11:46 +00:00
parent 02e2474c8f
commit 1355140ca5
2 changed files with 12 additions and 2 deletions
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10
lib/CodeGen/SelectionDAG/TargetLowering.cpp
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@ -1534,6 +1534,16 @@ bool TargetLowering::SimplifyDemandedBits(
if (Known.One[BitWidth - ShAmt - 1])
// New bits are known one.
Known.One.setHighBits(ShAmt);
// Attempt to avoid multi-use ops if we don't need anything from them.
if (!InDemandedMask.isAllOnesValue() || !DemandedElts.isAllOnesValue()) {
SDValue DemandedOp0 = SimplifyMultipleUseDemandedBits(
Op0, InDemandedMask, DemandedElts, TLO.DAG, Depth + 1);
if (DemandedOp0) {
SDValue NewOp = TLO.DAG.getNode(ISD::SRA, dl, VT, DemandedOp0, Op1);
return TLO.CombineTo(Op, NewOp);
}
}
}
break;
}

4
test/CodeGen/X86/const-shift-of-constmasked.ll
View File

@ -1870,9 +1870,9 @@ define i64 @test_i64_18446744065119617024_mask_ashr_1(i64 %a0) {
define i64 @test_i64_18446744065119617024_mask_ashr_32(i64 %a0) {
; X32-LABEL: test_i64_18446744065119617024_mask_ashr_32:
; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl %edx, %eax
; X32-NEXT: andl $-2, %eax
; X32-NEXT: movl %eax, %edx
; X32-NEXT: sarl $31, %edx
; X32-NEXT: retl
;