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[NewPM][NVPTX] Port NVPTX opt passes
There are only two used in the IR optimization pipeline. Port these and add them to the default pipeline. Similar to https://reviews.llvm.org/D93863. I added -mtriple to some tests since under the new PM, the passes are only available when the TargetMachine is specified. Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D93930
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@ -14,6 +14,7 @@
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#ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
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#define LLVM_LIB_TARGET_NVPTX_NVPTX_H
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#include "llvm/IR/PassManager.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CodeGen.h"
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@ -47,6 +48,24 @@ FunctionPass *createNVPTXLowerAllocaPass();
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MachineFunctionPass *createNVPTXPeephole();
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MachineFunctionPass *createNVPTXProxyRegErasurePass();
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struct NVVMIntrRangePass : PassInfoMixin<NVVMIntrRangePass> {
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NVVMIntrRangePass();
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NVVMIntrRangePass(unsigned SmVersion) : SmVersion(SmVersion) {}
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PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
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private:
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unsigned SmVersion;
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};
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struct NVVMReflectPass : PassInfoMixin<NVVMReflectPass> {
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NVVMReflectPass();
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NVVMReflectPass(unsigned SmVersion) : SmVersion(SmVersion) {}
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PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
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private:
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unsigned SmVersion;
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};
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namespace NVPTX {
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enum DrvInterface {
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NVCL,
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@ -24,6 +24,7 @@
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/IR/LegacyPassManager.h"
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#include "llvm/Pass.h"
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#include "llvm/Passes/PassBuilder.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Target/TargetMachine.h"
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@ -205,6 +206,32 @@ void NVPTXTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
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});
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}
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void NVPTXTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
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bool DebugPassManager) {
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PB.registerPipelineParsingCallback(
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[](StringRef PassName, FunctionPassManager &PM,
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ArrayRef<PassBuilder::PipelineElement>) {
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if (PassName == "nvvm-reflect") {
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PM.addPass(NVVMReflectPass());
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return true;
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}
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if (PassName == "nvvm-intr-range") {
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PM.addPass(NVVMIntrRangePass());
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return true;
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}
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return false;
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});
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PB.registerPipelineStartEPCallback(
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[this, DebugPassManager](ModulePassManager &PM,
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PassBuilder::OptimizationLevel Level) {
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FunctionPassManager FPM(DebugPassManager);
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FPM.addPass(NVVMReflectPass(Subtarget.getSmVersion()));
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FPM.addPass(NVVMIntrRangePass(Subtarget.getSmVersion()));
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PM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM)));
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});
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}
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TargetTransformInfo
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NVPTXTargetMachine::getTargetTransformInfo(const Function &F) {
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return TargetTransformInfo(NVPTXTTIImpl(this, F));
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@ -62,6 +62,8 @@ public:
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}
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void adjustPassManager(PassManagerBuilder &) override;
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void registerPassBuilderCallbacks(PassBuilder &PB,
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bool DebugPassManager) override;
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TargetTransformInfo getTargetTransformInfo(const Function &F) override;
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@ -17,6 +17,7 @@
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicsNVPTX.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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@ -32,21 +33,13 @@ static cl::opt<unsigned> NVVMIntrRangeSM("nvvm-intr-range-sm", cl::init(20),
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namespace {
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class NVVMIntrRange : public FunctionPass {
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private:
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struct {
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unsigned x, y, z;
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} MaxBlockSize, MaxGridSize;
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unsigned SmVersion;
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public:
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static char ID;
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NVVMIntrRange() : NVVMIntrRange(NVVMIntrRangeSM) {}
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NVVMIntrRange(unsigned int SmVersion) : FunctionPass(ID) {
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MaxBlockSize.x = 1024;
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MaxBlockSize.y = 1024;
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MaxBlockSize.z = 64;
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MaxGridSize.x = SmVersion >= 30 ? 0x7fffffff : 0xffff;
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MaxGridSize.y = 0xffff;
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MaxGridSize.z = 0xffff;
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NVVMIntrRange(unsigned int SmVersion)
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: FunctionPass(ID), SmVersion(SmVersion) {
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initializeNVVMIntrRangePass(*PassRegistry::getPassRegistry());
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}
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@ -79,7 +72,18 @@ static bool addRangeMetadata(uint64_t Low, uint64_t High, CallInst *C) {
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return true;
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}
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bool NVVMIntrRange::runOnFunction(Function &F) {
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static bool runNVVMIntrRange(Function &F, unsigned SmVersion) {
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struct {
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unsigned x, y, z;
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} MaxBlockSize, MaxGridSize;
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MaxBlockSize.x = 1024;
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MaxBlockSize.y = 1024;
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MaxBlockSize.z = 64;
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MaxGridSize.x = SmVersion >= 30 ? 0x7fffffff : 0xffff;
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MaxGridSize.y = 0xffff;
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MaxGridSize.z = 0xffff;
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// Go through the calls in this function.
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bool Changed = false;
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for (Instruction &I : instructions(F)) {
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@ -151,3 +155,15 @@ bool NVVMIntrRange::runOnFunction(Function &F) {
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return Changed;
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}
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bool NVVMIntrRange::runOnFunction(Function &F) {
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return runNVVMIntrRange(F, SmVersion);
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}
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NVVMIntrRangePass::NVVMIntrRangePass() : NVVMIntrRangePass(NVVMIntrRangeSM) {}
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PreservedAnalyses NVVMIntrRangePass::run(Function &F,
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FunctionAnalysisManager &AM) {
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return runNVVMIntrRange(F, SmVersion) ? PreservedAnalyses::none()
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: PreservedAnalyses::all();
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}
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@ -29,6 +29,7 @@
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/IntrinsicsNVPTX.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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@ -73,7 +74,7 @@ INITIALIZE_PASS(NVVMReflect, "nvvm-reflect",
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"Replace occurrences of __nvvm_reflect() calls with 0/1", false,
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false)
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bool NVVMReflect::runOnFunction(Function &F) {
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static bool runNVVMReflect(Function &F, unsigned SmVersion) {
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if (!NVVMReflectEnabled)
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return false;
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@ -179,3 +180,15 @@ bool NVVMReflect::runOnFunction(Function &F) {
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return ToRemove.size() > 0;
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}
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bool NVVMReflect::runOnFunction(Function &F) {
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return runNVVMReflect(F, SmVersion);
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}
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NVVMReflectPass::NVVMReflectPass() : NVVMReflectPass(0) {}
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PreservedAnalyses NVVMReflectPass::run(Function &F,
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FunctionAnalysisManager &AM) {
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return runNVVMReflect(F, SmVersion) ? PreservedAnalyses::none()
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: PreservedAnalyses::all();
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}
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@ -2,9 +2,14 @@
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck -allow-deprecated-dag-overlap %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -nvvm-intr-range \
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; RUN: | FileCheck -allow-deprecated-dag-overlap --check-prefix=RANGE --check-prefix=RANGE_20 %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -passes=nvvm-intr-range \
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; RUN: | FileCheck -allow-deprecated-dag-overlap --check-prefix=RANGE --check-prefix=RANGE_20 %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda \
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; RUN: -nvvm-intr-range -nvvm-intr-range-sm=30 \
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; RUN: | FileCheck -allow-deprecated-dag-overlap --check-prefix=RANGE --check-prefix=RANGE_30 %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda \
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; RUN: -passes=nvvm-intr-range -nvvm-intr-range-sm=30 \
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; RUN: | FileCheck -allow-deprecated-dag-overlap --check-prefix=RANGE --check-prefix=RANGE_30 %s
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define ptx_device i32 @test_tid_x() {
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; CHECK: mov.u32 %r{{[0-9]+}}, %tid.x;
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; RUN: opt < %s -S -nvvm-reflect | FileCheck %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -nvvm-reflect | FileCheck %s
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; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -passes=nvvm-reflect | FileCheck %s
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declare i32 @__nvvm_reflect(i8*)
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@str = private unnamed_addr addrspace(1) constant [11 x i8] c"__CUDA_FTZ\00"
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@ -3,12 +3,12 @@
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; RUN: cat %s > %t.noftz
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; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 0}' >> %t.noftz
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; RUN: opt %t.noftz -S -nvvm-reflect -O2 \
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; RUN: opt %t.noftz -S -mtriple=nvptx-nvidia-cuda -nvvm-reflect -O2 \
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; RUN: | FileCheck %s --check-prefix=USE_FTZ_0 --check-prefix=CHECK
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; RUN: cat %s > %t.ftz
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; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 1}' >> %t.ftz
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; RUN: opt %t.ftz -S -nvvm-reflect -O2 \
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; RUN: opt %t.ftz -S -mtriple=nvptx-nvidia-cuda -nvvm-reflect -O2 \
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; RUN: | FileCheck %s --check-prefix=USE_FTZ_1 --check-prefix=CHECK
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@str = private unnamed_addr addrspace(4) constant [11 x i8] c"__CUDA_FTZ\00"
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@ -463,6 +463,8 @@ struct TimeTracerRAII {
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// it exists.
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static bool shouldPinPassToLegacyPM(StringRef Pass) {
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std::vector<StringRef> PassNameExactToIgnore = {
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"nvvm-reflect",
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"nvvm-intr-range",
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"amdgpu-simplifylib",
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"amdgpu-usenative",
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"amdgpu-promote-alloca",
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