diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h
index c308d8fde05..6eb997ba1a1 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -366,7 +366,8 @@ public:
 
   bool isUnspillableTerminatorImpl(const MachineInstr *MI) const override {
     return MI->getOpcode() == ARM::t2LoopEndDec ||
-           MI->getOpcode() == ARM::t2DoLoopStartTP;
+           MI->getOpcode() == ARM::t2DoLoopStartTP ||
+           MI->getOpcode() == ARM::t2WhileLoopStartLR;
   }
 
 private:
diff --git a/test/CodeGen/Thumb2/phi_prevent_copy.mir b/test/CodeGen/Thumb2/phi_prevent_copy.mir
new file mode 100644
index 00000000000..e9e7492c0f1
--- /dev/null
+++ b/test/CodeGen/Thumb2/phi_prevent_copy.mir
@@ -0,0 +1,100 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve -simplify-mir -run-pass=phi-node-elimination %s -o - | FileCheck %s
+--- |
+  ; ModuleID = '<stdin>'
+  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+  target triple = "arm-arm-none-eabi"
+
+  ; Function Attrs: nofree norecurse nounwind
+  define void @test(i8* noalias nocapture %X, i8* noalias nocapture readonly %Y, i32 %n) {
+  entry:
+    %cmp6 = icmp sgt i32 %n, 0
+    br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
+
+  for.body.preheader:                               ; preds = %entry
+    call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %X, i8* align 4 %Y, i32 %n, i1 false)
+    br label %for.cond.cleanup
+
+  for.cond.cleanup:                                 ; preds = %for.body.preheader, %entry
+    ret void
+  }
+
+  ; Function Attrs: argmemonly nofree nosync nounwind willreturn
+  declare void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i32, i1 immarg)
+
+...
+---
+name:            test
+tracksRegLiveness: true
+body:             |
+  ; CHECK-LABEL: name: test
+  ; CHECK: bb.0.entry:
+  ; CHECK:   successors: %bb.1(0x50000000), %bb.3(0x30000000)
+  ; CHECK:   liveins: $r0, $r1, $r2
+  ; CHECK:   [[COPY:%[0-9]+]]:rgpr = COPY killed $r2
+  ; CHECK:   [[COPY1:%[0-9]+]]:rgpr = COPY killed $r1
+  ; CHECK:   [[COPY2:%[0-9]+]]:rgpr = COPY killed $r0
+  ; CHECK:   t2CMPri [[COPY]], 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK:   t2Bcc %bb.3, 11 /* CC::lt */, killed $cpsr
+  ; CHECK:   t2B %bb.1, 14 /* CC::al */, $noreg
+  ; CHECK: bb.1.for.body.preheader:
+  ; CHECK:   [[t2ADDri:%[0-9]+]]:rgpr = t2ADDri [[COPY]], 15, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK:   [[t2BICri:%[0-9]+]]:rgpr = t2BICri killed [[t2ADDri]], 16, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK:   [[t2LSRri:%[0-9]+]]:gprlr = t2LSRri killed [[t2BICri]], 4, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK:   [[COPY3:%[0-9]+]]:rgpr = COPY [[COPY1]]
+  ; CHECK:   [[COPY4:%[0-9]+]]:rgpr = COPY [[COPY2]]
+  ; CHECK:   [[COPY5:%[0-9]+]]:rgpr = COPY [[COPY]]
+  ; CHECK:   [[t2WhileLoopStartLR:%[0-9]+]]:gprlr = t2WhileLoopStartLR killed [[t2LSRri]], %bb.3, implicit-def dead $cpsr
+  ; CHECK: bb.2:
+  ; CHECK:   [[COPY6:%[0-9]+]]:rgpr = COPY [[COPY5]]
+  ; CHECK:   [[COPY7:%[0-9]+]]:gprlr = COPY [[t2WhileLoopStartLR]]
+  ; CHECK:   [[COPY8:%[0-9]+]]:rgpr = COPY [[COPY4]]
+  ; CHECK:   [[COPY9:%[0-9]+]]:rgpr = COPY [[COPY3]]
+  ; CHECK:   [[MVE_VCTP8_:%[0-9]+]]:vccr = MVE_VCTP8 [[COPY6]], 0, $noreg
+  ; CHECK:   [[t2SUBri:%[0-9]+]]:rgpr = t2SUBri killed [[COPY6]], 16, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK:   [[MVE_VLDRBU8_post:%[0-9]+]]:rgpr, [[MVE_VLDRBU8_post1:%[0-9]+]]:mqpr = MVE_VLDRBU8_post killed [[COPY9]], 16, 1, [[MVE_VCTP8_]]
+  ; CHECK:   [[MVE_VSTRBU8_post:%[0-9]+]]:rgpr = MVE_VSTRBU8_post killed [[MVE_VLDRBU8_post1]], killed [[COPY8]], 16, 1, killed [[MVE_VCTP8_]]
+  ; CHECK:   [[COPY10:%[0-9]+]]:rgpr = COPY [[MVE_VLDRBU8_post]]
+  ; CHECK:   [[COPY10:%[0-9]+]]:rgpr = COPY [[MVE_VSTRBU8_post]]
+  ; CHECK:   [[COPY10:%[0-9]+]]:rgpr = COPY [[t2SUBri]]
+  ; CHECK:   [[t2LoopEndDec:%[0-9]+]]:gprlr = t2LoopEndDec killed [[COPY7]], %bb.2, implicit-def dead $cpsr
+  ; CHECK:   t2B %bb.3, 14 /* CC::al */, $noreg
+  ; CHECK: bb.3.for.cond.cleanup:
+  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg
+  bb.0.entry:
+    successors: %bb.1(0x50000000), %bb.3(0x30000000)
+    liveins: $r0, $r1, $r2
+
+    %2:rgpr = COPY killed $r2
+    %1:rgpr = COPY killed $r1
+    %0:rgpr = COPY killed $r0
+    t2CMPri %2, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
+    t2Bcc %bb.3, 11 /* CC::lt */, killed $cpsr
+    t2B %bb.1, 14 /* CC::al */, $noreg
+
+  bb.1.for.body.preheader:
+    successors: %bb.3(0x40000000), %bb.2(0x40000000)
+
+    %3:rgpr = t2ADDri %2, 15, 14 /* CC::al */, $noreg, $noreg
+    %4:rgpr = t2BICri killed %3, 16, 14 /* CC::al */, $noreg, $noreg
+    %5:gprlr = t2LSRri killed %4, 4, 14 /* CC::al */, $noreg, $noreg
+    %6:gprlr = t2WhileLoopStartLR killed %5, %bb.3, implicit-def dead $cpsr
+
+  bb.2:
+    successors: %bb.2(0x40000000), %bb.3(0x40000000)
+
+    %7:rgpr = PHI %1, %bb.1, %8, %bb.2
+    %9:rgpr = PHI %0, %bb.1, %10, %bb.2
+    %11:gprlr = PHI %6, %bb.1, %12, %bb.2
+    %13:rgpr = PHI %2, %bb.1, %14, %bb.2
+    %15:vccr = MVE_VCTP8 %13, 0, $noreg
+    %14:rgpr = t2SUBri killed %13, 16, 14 /* CC::al */, $noreg, $noreg
+    %8:rgpr, %16:mqpr = MVE_VLDRBU8_post killed %7, 16, 1, %15
+    %10:rgpr = MVE_VSTRBU8_post killed %16, killed %9, 16, 1, killed %15
+    %12:gprlr = t2LoopEndDec killed %11, %bb.2, implicit-def dead $cpsr
+    t2B %bb.3, 14 /* CC::al */, $noreg
+
+  bb.3.for.cond.cleanup:
+    tBX_RET 14 /* CC::al */, $noreg
+
+...