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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00

[Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC

It's useful outside of Hexagon TTI, and with how TTI is implemented,
it is not accessible outside of TTI.
This commit is contained in:
Krzysztof Parzyszek 2020-11-02 13:57:42 -06:00
parent 158d222d30
commit 13b75ea80b
4 changed files with 59 additions and 55 deletions

View File

@ -125,6 +125,59 @@ HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
return *this;
}
bool HexagonSubtarget::isHVXElementType(MVT Ty, bool IncludeBool) const {
if (!useHVXOps())
return false;
if (Ty.isVector())
Ty = Ty.getVectorElementType();
if (IncludeBool && Ty == MVT::i1)
return true;
ArrayRef<MVT> ElemTypes = getHVXElementTypes();
return llvm::find(ElemTypes, Ty) != ElemTypes.end();
}
bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const {
if (!VecTy.isVector() || !useHVXOps() || VecTy.isScalableVector())
return false;
MVT ElemTy = VecTy.getVectorElementType();
if (!IncludeBool && ElemTy == MVT::i1)
return false;
unsigned HwLen = getVectorLength();
unsigned NumElems = VecTy.getVectorNumElements();
ArrayRef<MVT> ElemTypes = getHVXElementTypes();
if (IncludeBool && ElemTy == MVT::i1) {
// Boolean HVX vector types are formed from regular HVX vector types
// by replacing the element type with i1.
for (MVT T : ElemTypes)
if (NumElems * T.getSizeInBits() == 8 * HwLen)
return true;
return false;
}
unsigned VecWidth = VecTy.getSizeInBits();
if (VecWidth != 8 * HwLen && VecWidth != 16 * HwLen)
return false;
return llvm::find(ElemTypes, ElemTy) != ElemTypes.end();
}
bool HexagonSubtarget::isTypeForHVX(Type *VecTy, bool IncludeBool) const {
if (!VecTy->isVectorTy() || isa<ScalableVectorType>(VecTy))
return false;
// Avoid types like <2 x i32*>.
if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
return false;
EVT Ty = EVT::getEVT(VecTy, /*HandleUnknown*/false);
if (!Ty.isSimple() || Ty.getSizeInBits() <= 64)
return false;
if (isHVXVectorType(Ty.getSimpleVT(), IncludeBool))
return true;
auto Action =
getTargetLowering()->getPreferredVectorAction(Ty.getSimpleVT());
return Action == TargetLoweringBase::TypeWidenVector;
}
void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) {
for (SUnit &SU : DAG->SUnits) {
if (!SU.isInstr())

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@ -275,42 +275,9 @@ public:
return makeArrayRef(Types);
}
bool isHVXElementType(MVT Ty, bool IncludeBool = false) const {
if (!useHVXOps())
return false;
if (Ty.isVector())
Ty = Ty.getVectorElementType();
if (IncludeBool && Ty == MVT::i1)
return true;
ArrayRef<MVT> ElemTypes = getHVXElementTypes();
return llvm::find(ElemTypes, Ty) != ElemTypes.end();
}
bool isHVXVectorType(MVT VecTy, bool IncludeBool = false) const {
if (!VecTy.isVector() || !useHVXOps() || VecTy.isScalableVector())
return false;
MVT ElemTy = VecTy.getVectorElementType();
if (!IncludeBool && ElemTy == MVT::i1)
return false;
unsigned HwLen = getVectorLength();
unsigned NumElems = VecTy.getVectorNumElements();
ArrayRef<MVT> ElemTypes = getHVXElementTypes();
if (IncludeBool && ElemTy == MVT::i1) {
// Boolean HVX vector types are formed from regular HVX vector types
// by replacing the element type with i1.
for (MVT T : ElemTypes)
if (NumElems * T.getSizeInBits() == 8*HwLen)
return true;
return false;
}
unsigned VecWidth = VecTy.getSizeInBits();
if (VecWidth != 8*HwLen && VecWidth != 16*HwLen)
return false;
return llvm::find(ElemTypes, ElemTy) != ElemTypes.end();
}
bool isHVXElementType(MVT Ty, bool IncludeBool = false) const;
bool isHVXVectorType(MVT VecTy, bool IncludeBool = false) const;
bool isTypeForHVX(Type *VecTy, bool IncludeBool = false) const;
unsigned getTypeAlignment(MVT Ty) const {
if (isHVXVectorType(Ty, true))

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@ -47,21 +47,6 @@ bool HexagonTTIImpl::useHVX() const {
return ST.useHVXOps() && HexagonAutoHVX;
}
bool HexagonTTIImpl::isTypeForHVX(Type *VecTy) const {
if (!VecTy->isVectorTy() || isa<ScalableVectorType>(VecTy))
return false;
// Avoid types like <2 x i32*>.
if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
return false;
EVT VecVT = EVT::getEVT(VecTy);
if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64)
return false;
if (ST.isHVXVectorType(VecVT.getSimpleVT()))
return true;
auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT());
return Action == TargetLoweringBase::TypeWidenVector;
}
unsigned HexagonTTIImpl::getTypeNumElements(Type *Ty) const {
if (auto *VTy = dyn_cast<FixedVectorType>(Ty))
return VTy->getNumElements();
@ -171,7 +156,7 @@ unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
if (Src->isVectorTy()) {
VectorType *VecTy = cast<VectorType>(Src);
unsigned VecWidth = VecTy->getPrimitiveSizeInBits().getFixedSize();
if (useHVX() && isTypeForHVX(VecTy)) {
if (useHVX() && ST.isTypeForHVX(VecTy)) {
unsigned RegWidth = getRegisterBitWidth(true);
assert(RegWidth && "Non-zero vector register width expected");
// Cost of HVX loads.
@ -314,11 +299,11 @@ unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
}
bool HexagonTTIImpl::isLegalMaskedStore(Type *DataType, Align /*Alignment*/) {
return HexagonMaskedVMem && isTypeForHVX(DataType);
return HexagonMaskedVMem && ST.isTypeForHVX(DataType);
}
bool HexagonTTIImpl::isLegalMaskedLoad(Type *DataType, Align /*Alignment*/) {
return HexagonMaskedVMem && isTypeForHVX(DataType);
return HexagonMaskedVMem && ST.isTypeForHVX(DataType);
}
/// --- Vector TTI end ---

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@ -43,7 +43,6 @@ class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
const HexagonTargetLowering *getTLI() const { return &TLI; }
bool useHVX() const;
bool isTypeForHVX(Type *VecTy) const;
// Returns the number of vector elements of Ty, if Ty is a vector type,
// or 1 if Ty is a scalar type. It is incorrect to call this function