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AMDGPU: Add convergent flag to INLINEASM instruction.

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Differential Revision: http://reviews.llvm.org/D21214

llvm-svn: 273455
This commit is contained in:
Wei Ding 2016-06-22 18:51:08 +00:00
parent 5d925cf04d
commit 14148ed32d
6 changed files with 58 additions and 2 deletions
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5
include/llvm/CodeGen/MachineInstr.h
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@ -526,6 +526,11 @@ public:
/// Convergent instructions can not be made control-dependent on any
/// additional values.
bool isConvergent(QueryType Type = AnyInBundle) const {
if (isInlineAsm()) {
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
if (ExtraInfo & InlineAsm::Extra_IsConvergent)
return true;
}
return hasProperty(MCID::Convergent, Type);
}

1
include/llvm/IR/InlineAsm.h
View File

@ -223,6 +223,7 @@ public:
Extra_AsmDialect = 4,
Extra_MayLoad = 8,
Extra_MayStore = 16,
Extra_IsConvergent = 32,
// Inline asm operands map to multiple SDNode / MachineInstr operands.
// The first operand is an immediate describing the asm operand, the low

2
lib/CodeGen/MachineInstr.cpp
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@ -1754,6 +1754,8 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS << " [mayload]";
if (ExtraInfo & InlineAsm::Extra_MayStore)
OS << " [maystore]";
if (ExtraInfo & InlineAsm::Extra_IsConvergent)
OS << " [isconvergent]";
if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
OS << " [alignstack]";
if (getInlineAsmDialect() == InlineAsm::AD_ATT)

5
lib/CodeGen/MachineVerifier.cpp
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@ -810,8 +810,9 @@ void MachineVerifier::verifyInlineAsm(const MachineInstr *MI) {
if (!MI->getOperand(1).isImm())
report("Asm flags must be an immediate", MI);
// Allowed flags are Extra_HasSideEffects = 1, Extra_IsAlignStack = 2,
// Extra_AsmDialect = 4, Extra_MayLoad = 8, and Extra_MayStore = 16.
if (!isUInt<5>(MI->getOperand(1).getImm()))
// Extra_AsmDialect = 4, Extra_MayLoad = 8, and Extra_MayStore = 16,
// and Extra_IsConvergent = 32.
if (!isUInt<6>(MI->getOperand(1).getImm()))
report("Unknown asm flags", &MI->getOperand(1), 1);
static_assert(InlineAsm::MIOp_FirstOperand == 2, "Asm format changed");

2
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@ -6763,6 +6763,8 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
ExtraInfo |= InlineAsm::Extra_HasSideEffects;
if (IA->isAlignStack())
ExtraInfo |= InlineAsm::Extra_IsAlignStack;
if (CS.isConvergent())
ExtraInfo |= InlineAsm::Extra_IsConvergent;
// Set the asm dialect.
ExtraInfo |= IA->getDialect() * InlineAsm::Extra_AsmDialect;

45
test/CodeGen/AMDGPU/convergent-inlineasm.ll Normal file
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@ -0,0 +1,45 @@
; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
declare i32 @llvm.amdgcn.workitem.id.x() #0
; GCN-LABEL: {{^}}convergent_inlineasm:
; GCN: BB#0:
; GCN: v_cmp_ne_i32_e64
; GCN: BB#1:
define void @convergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
bb:
%tmp = call i32 @llvm.amdgcn.workitem.id.x()
%tmp1 = tail call i64 asm "v_cmp_ne_i32_e64 $0, 0, $1", "=s,v"(i32 1) #1
%tmp2 = icmp eq i32 %tmp, 8
br i1 %tmp2, label %bb3, label %bb5
bb3: ; preds = %bb
%tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
store i64 %tmp1, i64 addrspace(1)* %arg, align 8
br label %bb5
bb5: ; preds = %bb3, %bb
ret void
}
; GCN-LABEL: {{^}}nonconvergent_inlineasm:
; GCN: BB#1:
; GCN: v_cmp_ne_i32_e64
; GCN: BB1_2:
define void @nonconvergent_inlineasm(i64 addrspace(1)* nocapture %arg) {
bb:
%tmp = call i32 @llvm.amdgcn.workitem.id.x()
%tmp1 = tail call i64 asm "v_cmp_ne_i32_e64 $0, 0, $1", "=s,v"(i32 1)
%tmp2 = icmp eq i32 %tmp, 8
br i1 %tmp2, label %bb3, label %bb5
bb3: ; preds = %bb
%tmp4 = getelementptr i64, i64 addrspace(1)* %arg, i32 %tmp
store i64 %tmp1, i64 addrspace(1)* %arg, align 8
br label %bb5
bb5: ; preds = %bb3, %bb
ret void
}
attributes #0 = { nounwind readnone }
attributes #1 = { convergent nounwind readnone }