RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 18:42:46 +02:00
Code Issues Projects Releases Wiki Activity

Eliminate more uses of llvm-as and llvm-dis.

Browse Source 
llvm-svn: 81293
This commit is contained in:
Dan Gohman 2009-09-09 00:09:15 +00:00
parent df2896d609
commit 142428ce64
1178 changed files with 1654 additions and 1654 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
test/Analysis/BasicAA/2007-08-01-NoAliasAndCalls.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %., i32\\* %.} | grep {%x} | grep {%y}
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %., i32\\* %.} | grep {%x} | grep {%y}
declare i32* @unclear(i32* %a)

6
test/Analysis/BasicAA/2007-08-01-NoAliasAndGEP.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias}
; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias}
; RUN: llvm-as %s -o - | opt -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer}
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {9 no alias}
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {6 may alias}
; RUN: opt < %s -basicaa -aa-eval -print-all-alias-modref-info -disable-output |& grep {MayAlias:.*i32\\* %Ipointer, i32\\* %Jpointer}
define void @foo(i32* noalias %p, i32* noalias %q, i32 %i, i32 %j) {
%Ipointer = getelementptr i32* %p, i32 %i

2
test/CodeGen/ARM/2006-11-10-CycleInDAG.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
; RUN: llc < %s -march=arm -mattr=+v6
%struct.layer_data = type { i32, [2048 x i8], i8*, [16 x i8], i32, i8*, i32, i32, [64 x i32], [64 x i32], [64 x i32], [64 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [12 x [64 x i16]] }
@ld = external global %struct.layer_data* ; <%struct.layer_data**> [#uses=1]

2
test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
@quant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]
@dequant_coef = external global [6 x [4 x [4 x i32]]] ; <[6 x [4 x [4 x i32]]]*> [#uses=1]

2
test/CodeGen/ARM/2007-03-07-CombinerCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
define fastcc i8* @read_sleb128(i8* %p, i32* %val) {
br label %bb

4
test/CodeGen/ARM/2007-03-13-InstrSched.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
; RUN: -mattr=+v6 | grep r9
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic \
; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats |& grep asm-printer
; | grep 35

2
test/CodeGen/ARM/2007-03-21-JoinIntervalsCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; PR1257
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }

2
test/CodeGen/ARM/2007-03-26-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR1266
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2007-03-27-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
; PR1279
%struct.rtx_def = type { i16, i8, i8, %struct.u }

2
test/CodeGen/ARM/2007-03-30-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
; PR1279
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32 }

2
test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin
; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin
%struct.H_TBL = type { [17 x i8], [256 x i8], i32 }
%struct.Q_TBL = type { [64 x i16], i32 }

2
test/CodeGen/ARM/2007-04-03-PEIBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm | not grep {add.*#0}
; RUN: llc < %s -march=arm | not grep {add.*#0}
define i32 @foo() {
entry:

2
test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic | \
; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | \
; RUN: not grep LPC9
%struct.B = type { i32 }

2
test/CodeGen/ARM/2007-04-30-CombinerCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "arm-apple-darwin8"

2
test/CodeGen/ARM/2007-05-03-BadPostIndexedLd.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
%struct.Connection = type { i32, [10 x i8], i32 }
%struct.IntChunk = type { %struct.cppobjtype, i32, i32*, i32 }

2
test/CodeGen/ARM/2007-05-07-jumptoentry.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc | not grep 1_0
; RUN: llc < %s | not grep 1_0
; This used to create an extra branch to 'entry', LBB1_0.
; ModuleID = 'bug.bc'

8
test/CodeGen/ARM/2007-05-07-tailmerge-1.ll
View File

@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
; Check that calls to baz and quux are tail-merged.
; PR1628

8
test/CodeGen/ARM/2007-05-09-tailmerge-2.ll
View File

@ -1,7 +1,7 @@
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge | grep bl.*quux | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1
; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*baz | count 1
; RUN: llc < %s -march=arm -enable-tail-merge -enable-eh | grep bl.*quux | count 1
; Check that calls to baz and quux are tail-merged.
; PR1628

2
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
; RUN: llc < %s -march=arm -mattr=+v6
define i32 @test3() {
tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )

2
test/CodeGen/ARM/2007-05-14-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi
; PR1406
%struct.AVClass = type { i8*, i8* (i8*)*, %struct.AVOption* }

16
test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
View File

@ -1,11 +1,11 @@
; RUN: llvm-as < %s | llc -march=arm | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm | grep bl.*quux | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*baz | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-eh | grep bl.*quux | count 1
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
; RUN: llvm-as < %s | llc -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
; RUN: llc < %s -march=arm | grep bl.*baz | count 1
; RUN: llc < %s -march=arm | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2
; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2
; RUN: llc < %s -march=arm -enable-eh | grep bl.*baz | count 1
; RUN: llc < %s -march=arm -enable-eh | grep bl.*quux | count 1
; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*baz | count 2
; RUN: llc < %s -march=arm -enable-tail-merge=0 -enable-eh | grep bl.*quux | count 2
; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works.
; PR1628

2
test/CodeGen/ARM/2007-05-23-BadPreIndexedStore.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm | not grep {str.*\\!}
; RUN: llc < %s -march=arm | not grep {str.*\\!}
%struct.shape_edge_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32 }
%struct.shape_path_t = type { %struct.shape_edge_t*, %struct.shape_edge_t*, i32, i32, i32, i32, i32, i32 }

2
test/CodeGen/ARM/2007-05-31-RegScavengerInfiniteLoop.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc
; RUN: llc < %s
; PR1424
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2007-08-15-ReuseBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6
; PR1609
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

2
test/CodeGen/ARM/2008-02-04-LocalRegAllocBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi -regalloc=local
; RUN: llc < %s -mtriple=arm-linux-gnueabi -regalloc=local
; PR1925
%struct.encode_aux_nearestmatch = type { i32*, i32*, i32*, i32*, i32, i32 }

2
test/CodeGen/ARM/2008-02-29-RegAllocLocal.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -regalloc=local
; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=local
; PR1925
%"struct.kc::impl_Ccode_option" = type { %"struct.kc::impl_abstract_phylum" }

2
test/CodeGen/ARM/2008-03-05-SxtInRegBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | not grep 255
; RUN: llc < %s -march=arm -mattr=+v6 | not grep 255
define i32 @main(i32 %argc, i8** %argv) {
entry:

2
test/CodeGen/ARM/2008-03-07-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6,+vfp2
@accum = external global { double, double } ; <{ double, double }*> [#uses=1]
@.str = external constant [4 x i8] ; <[4 x i8]*> [#uses=1]

2
test/CodeGen/ARM/2008-04-04-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
@numBinsY = external global i32 ; <i32*> [#uses=1]

2
test/CodeGen/ARM/2008-04-10-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
%struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }

2
test/CodeGen/ARM/2008-04-11-PHIofImpDef.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
declare void @foo(i8*, i8*, i32, i32, i32, i32, i32, i32, i32)

2
test/CodeGen/ARM/2008-05-19-LiveIntervalsBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
%struct.BiContextType = type { i16, i8, i32 }
%struct.Bitstream = type { i32, i32, i8, i32, i32, i8, i8, i32, i32, i8*, i32 }

2
test/CodeGen/ARM/2008-05-19-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
%struct.Decoders = type { i32**, i16***, i16****, i16***, i16**, i8**, i8** }
@decoders = external global %struct.Decoders ; <%struct.Decoders*> [#uses=1]

2
test/CodeGen/ARM/2008-07-17-Fdiv.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
define float @f(float %a, float %b) nounwind {
%tmp = fdiv float %a, %b

2
test/CodeGen/ARM/2008-07-24-CodeGenPrepCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR2589
define void @main({ i32 }*) {

2
test/CodeGen/ARM/2008-08-07-AsmPrintBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6 -relocation-model=pic | grep comm
%struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.__gcov_var = type { %struct.FILE*, i32, i32, i32, i32, i32, i32, [1025 x i32] }

2
test/CodeGen/ARM/2008-09-14-CoalescerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
@"\01LC1" = external constant [288 x i8] ; <[288 x i8]*> [#uses=1]

2
test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-apple-darwin
define void @gcov_exit() nounwind {
entry:

2
test/CodeGen/ARM/2008-11-18-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
define hidden i64 @__muldi3(i64 %u, i64 %v) nounwind {
entry:

2
test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164
; RUN: llc < %s -mtriple=arm-apple-darwin9 -stats |& grep asm-printer | grep 164
%"struct.Adv5::Ekin<3>" = type <{ i8 }>
%"struct.Adv5::X::Energyflux<3>" = type { double }

2
test/CodeGen/ARM/2009-02-16-SpillerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
target triple = "arm-apple-darwin9"
%struct.FILE_POS = type { i8, i8, i16, i32 }

2
test/CodeGen/ARM/2009-02-22-SoftenFloatVaArg.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc
; RUN: llc < %s
; PR3610
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-s0:0:64-f80:32:32"
target triple = "arm-elf"

2
test/CodeGen/ARM/2009-02-27-SpillerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2
; RUN: llc < %s -march=arm -mattr=+v6,+vfp2
target triple = "arm-apple-darwin9"
@a = external global double ; <double*> [#uses=1]

2
test/CodeGen/ARM/2009-03-07-SpillerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin9 -mattr=+vfp2
; RUN: llc < %s -mtriple=armv6-apple-darwin9 -mattr=+vfp2
; rdar://6653182
%struct.ggBRDF = type { i32 (...)** }

2
test/CodeGen/ARM/2009-03-09-AddrModeBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
%struct.hit_t = type { %struct.v_t, double }
%struct.node_t = type { %struct.hit_t, %struct.hit_t, i32 }

2
test/CodeGen/ARM/2009-04-06-AsmModifier.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm | grep {swi 107}
; RUN: llc < %s -march=arm | grep {swi 107}
define i32 @_swilseek(i32) nounwind {
entry:

2
test/CodeGen/ARM/2009-04-08-AggregateAddr.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR3795
define fastcc void @_D3foo3fooFAriZv({ i32, { double, double }* } %d_arg, i32 %x_arg) {

2
test/CodeGen/ARM/2009-04-08-FREM.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
declare i32 @printf(i8*, ...)

2
test/CodeGen/ARM/2009-04-08-FloatUndef.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
define void @execute_shader(<4 x float>* %OUT, <4 x float>* %IN, <4 x float>* %CONST) {
entry:

2
test/CodeGen/ARM/2009-04-09-RegScavengerAsm.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR3954
define void @foo(...) nounwind {

2
test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
; RUN: llc < %s -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
; PR4166
%"byte[]" = type { i32, i8* }

2
test/CodeGen/ARM/2009-05-07-RegAllocLocal.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
; RUN: llc < %s -mtriple=armv5-unknown-linux-gnueabi -O0 -regalloc=local
; PR4100
@.str = external constant [30 x i8] ; <[30 x i8]*> [#uses=1]

2
test/CodeGen/ARM/2009-05-11-CodePlacementCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
%struct.List = type { %struct.List*, i32 }
@Node5 = external constant %struct.List ; <%struct.List*> [#uses=1]
@"\01LC" = external constant [7 x i8] ; <[7 x i8]*> [#uses=1]

2
test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm | grep swp
; RUN: llc < %s -march=arm | grep swp
; PR4091
define void @foo(i32 %i, i32* %p) nounwind {

2
test/CodeGen/ARM/2009-06-02-ISelCrash.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2
; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic -mattr=+v6,+vfp2
@"\01LC" = external constant [15 x i8] ; <[15 x i8]*> [#uses=1]

2
test/CodeGen/ARM/2009-06-04-MissingLiveIn.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin -mattr=+v6
; RUN: llc < %s -mtriple=arm-apple-darwin -mattr=+v6
%struct.anon = type { i16, i16 }
%struct.cab_archive = type { i32, i16, i16, i16, i16, i8, %struct.cab_folder*, %struct.cab_file* }

2
test/CodeGen/ARM/2009-06-12-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
; RUN: llc < %s -mtriple=armv6-apple-darwin
type { i32, i32, %struct.D_Sym**, [3 x %struct.D_Sym*] } ; type %0
type { i32, %struct.D_Reduction** } ; type %1

2
test/CodeGen/ARM/2009-06-15-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
; RUN: llc < %s -mtriple=armv6-apple-darwin
%struct.term = type { i32, i32, i32 }

2
test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
; RUN: llc < %s -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
; PR4419
define float @__ieee754_acosf(float %x) nounwind {

2
test/CodeGen/ARM/2009-06-22-CoalescerBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin
; RUN: llc < %s -mtriple=armv6-apple-darwin
%struct.rtunion = type { i64 }
%struct.rtx_def = type { i16, i8, i8, [1 x %struct.rtunion] }

2
test/CodeGen/ARM/2009-06-30-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@nn = external global i32 ; <i32*> [#uses=1]
@al_len = external global i32 ; <i32*> [#uses=2]

2
test/CodeGen/ARM/2009-06-30-RegScavengerAssert2.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@no_mat = external global i32 ; <i32*> [#uses=1]
@no_mis = external global i32 ; <i32*> [#uses=2]

2
test/CodeGen/ARM/2009-06-30-RegScavengerAssert3.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@JJ = external global i32* ; <i32**> [#uses=1]

2
test/CodeGen/ARM/2009-06-30-RegScavengerAssert4.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@r = external global i32 ; <i32*> [#uses=1]
@qr = external global i32 ; <i32*> [#uses=1]

2
test/CodeGen/ARM/2009-06-30-RegScavengerAssert5.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@XX = external global i32* ; <i32**> [#uses=1]

2
test/CodeGen/ARM/2009-07-01-CommuteBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=armv6-apple-darwin9
; RUN: llc < %s -march=arm -mtriple=armv6-apple-darwin9
@qr = external global i32 ; <i32*> [#uses=1]
@II = external global i32* ; <i32**> [#uses=1]

2
test/CodeGen/ARM/2009-07-09-asm-p-constraint.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6
; RUN: llc < %s -march=arm -mattr=+v6
define void @test(i8* %x) nounwind {
entry:

2
test/CodeGen/ARM/2009-07-18-RewriterBug.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep fcmpezd | count 13
; RUN: llc < %s -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep fcmpezd | count 13
%struct.EDGE_PAIR = type { %struct.edge_rec*, %struct.edge_rec* }
%struct.VEC2 = type { double, double, double }

2
test/CodeGen/ARM/2009-07-22-ScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-apple-darwin10
; RUN: llc < %s -mtriple=armv6-apple-darwin10
%struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
%struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }

2
test/CodeGen/ARM/2009-07-22-SchedulerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
%struct.cli_ac_alt = type { i8, i8*, i16, i16, %struct.cli_ac_alt* }
%struct.cli_ac_node = type { i8, i8, %struct.cli_ac_patt*, %struct.cli_ac_node**, %struct.cli_ac_node* }

2
test/CodeGen/ARM/2009-07-29-VFP3Registers.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv7-apple-darwin10 -mattr=+vfp3
; RUN: llc < %s -mtriple=armv7-apple-darwin10 -mattr=+vfp3
@a = external global double ; <double*> [#uses=1]

2
test/CodeGen/ARM/2009-08-02-RegScavengerAssert-Neon.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon
; RUN: llc < %s -march=arm -mattr=+neon
; PR4657
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-04-RegScavengerAssert-2.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-elf
; RUN: llc < %s -mtriple=armv6-elf
; PR4528
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-04-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=armv6-elf
; RUN: llc < %s -mtriple=armv6-elf
; PR4528
define arm_aapcscc i32 @file_read_actor(i32 %desc, i32 %page, i32 %offset, i32 %size) nounwind optsize {

2
test/CodeGen/ARM/2009-08-15-RegScavenger-EarlyClobber.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR4528
; Inline asm is allowed to contain operands "=&r", "0".

2
test/CodeGen/ARM/2009-08-15-RegScavengerAssert.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
; PR4716
define arm_aapcscc void @_start() nounwind naked {

2
test/CodeGen/ARM/2009-08-21-PostRAKill.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; RUN: llc < %s -march=arm -mattr=+vfp2 -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-21-PostRAKill2.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-21-PostRAKill3.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-21-PostRAKill4.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; RUN: llc < %s -asm-verbose=false -O3 -relocation-model=pic -disable-fp-elim -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -disable-post-RA-scheduler=0 -avoid-hazards
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64"

2
test/CodeGen/ARM/2009-08-23-linkerprivate.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-apple-darwin | FileCheck %s
; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | FileCheck %s
; ModuleID = '/Volumes/MacOS9/tests/WebKit/JavaScriptCore/profiler/ProfilerServer.mm'

2
test/CodeGen/ARM/2009-08-26-ScalarToVector.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mattr=+neon | not grep fldmfdd
; RUN: llc < %s -mattr=+neon | not grep fldmfdd
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
target triple = "thumbv7-elf"

2
test/CodeGen/ARM/2009-08-27-ScalarToVector.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mattr=+neon | not grep fldmfdd
; RUN: llc < %s -mattr=+neon | not grep fldmfdd
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
target triple = "thumbv7-elf"

2
test/CodeGen/ARM/2009-08-29-ExtractEltf32.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mattr=+neon
; RUN: llc < %s -mattr=+neon
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
target triple = "thumbv7-elf"

2
test/CodeGen/ARM/2009-08-29-TooLongSplat.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mattr=+neon
; RUN: llc < %s -mattr=+neon
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32"
target triple = "thumbv7-elf"

2
test/CodeGen/ARM/2009-08-31-LSDA-Name.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin9 -march=arm -f | FileCheck %s
; RUN: llc < %s -mtriple=arm-apple-darwin9 -march=arm -f | FileCheck %s
%struct.A = type { i32* }

2
test/CodeGen/ARM/2009-08-31-TwoRegShuffle.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
; pr4843
define <4 x i16> @v2regbug(<4 x i16>* %B) nounwind {
;CHECK: v2regbug:

2
test/CodeGen/ARM/addrmode.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm -stats |& grep asm-printer | grep 4
; RUN: llc < %s -march=arm -stats |& grep asm-printer | grep 4
define i32 @t1(i32 %a) {
%b = mul i32 %a, 9

8
test/CodeGen/ARM/align.ll
View File

@ -1,9 +1,9 @@
; RUN: llvm-as < %s | llc -march=arm | grep align.*1 | count 1
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
; RUN: llc < %s -march=arm | grep align.*1 | count 1
; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
; RUN: grep align.*2 | count 2
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
; RUN: grep align.*3 | count 2
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
; RUN: llc < %s -mtriple=arm-apple-darwin | \
; RUN: grep align.*2 | count 4
@a = global i1 true

4
test/CodeGen/ARM/alloca.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \
; RUN: grep {mov r11, sp}
; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu | \
; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | \
; RUN: grep {mov sp, r11}
define void @f(i32 %a) {

2
test/CodeGen/ARM/argaddr.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -march=arm
; RUN: llc < %s -march=arm
define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
entry:

2
test/CodeGen/ARM/arguments-nosplit-double.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
; PR4059
define i32 @f(i64 %z, i32 %a, double %b) {

2
test/CodeGen/ARM/arguments-nosplit-i64.ll
View File

@ -1,4 +1,4 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
; RUN: llc < %s -mtriple=arm-linux-gnueabi | not grep r3
; PR4058
define i32 @f(i64 %z, i32 %a, i64 %b) {

4
test/CodeGen/ARM/arguments.ll
View File

@ -1,6 +1,6 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | \
; RUN: llc < %s -mtriple=arm-linux-gnueabi | \
; RUN: grep {mov r0, r2} | count 1
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | \
; RUN: llc < %s -mtriple=arm-apple-darwin | \
; RUN: grep {mov r0, r1} | count 1
define i32 @f(i32 %a, i64 %b) {

4
test/CodeGen/ARM/arguments2.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define i32 @f(i32 %a, i128 %b) {
%tmp = call i32 @g(i128 %b)

4
test/CodeGen/ARM/arguments3.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define i64 @f(i32 %a, i128 %b) {
%tmp = call i64 @g(i128 %b)

4
test/CodeGen/ARM/arguments4.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define float @f(i32 %a, i128 %b) {
%tmp = call float @g(i128 %b)

4
test/CodeGen/ARM/arguments5.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define double @f(i32 %a, i128 %b) {
%tmp = call double @g(i128 %b)

4
test/CodeGen/ARM/arguments6.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define i128 @f(i32 %a, i128 %b) {
%tmp = call i128 @g(i128 %b)

4
test/CodeGen/ARM/arguments7.ll
View File

@ -1,5 +1,5 @@
; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi
; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
; RUN: llc < %s -mtriple=arm-linux-gnueabi
; RUN: llc < %s -mtriple=arm-apple-darwin
define double @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b) {
%tmp = call double @g(i32 %a2, i32 %a3, i32 %a4, i32 %a5, double %b)

Some files were not shown because too many files have changed in this diff Show More