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add a new MCInstPrinter::getOpcodeName interface, when it is
implemented, llvm-mc --show-inst now uses it to print the instruction opcode as well as the number. llvm-svn: 95929
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@ -14,8 +14,8 @@ namespace llvm {
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class MCInst;
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class MCInst;
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class raw_ostream;
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class raw_ostream;
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class MCAsmInfo;
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class MCAsmInfo;
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class StringRef;
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/// MCInstPrinter - This is an instance of a target assembly language printer
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/// MCInstPrinter - This is an instance of a target assembly language printer
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/// that converts an MCInst to valid target assembly syntax.
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/// that converts an MCInst to valid target assembly syntax.
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class MCInstPrinter {
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class MCInstPrinter {
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@ -40,6 +40,10 @@ public:
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/// printInst - Print the specified MCInst to the current raw_ostream.
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/// printInst - Print the specified MCInst to the current raw_ostream.
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///
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///
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virtual void printInst(const MCInst *MI) = 0;
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virtual void printInst(const MCInst *MI) = 0;
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/// getOpcodeName - Return the name of the specified opcode enum (e.g.
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/// "MOV32ri") or empty if we can't resolve it.
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virtual StringRef getOpcodeName(unsigned Opcode) const;
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};
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};
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} // namespace llvm
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} // namespace llvm
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@ -617,6 +617,12 @@ void MCAsmStreamer::EmitInstruction(const MCInst &Inst) {
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raw_ostream &OS = GetCommentOS();
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raw_ostream &OS = GetCommentOS();
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OS << "<MCInst #" << Inst.getOpcode();
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OS << "<MCInst #" << Inst.getOpcode();
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StringRef InstName;
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if (InstPrinter)
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InstName = InstPrinter->getOpcodeName(Inst.getOpcode());
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if (!InstName.empty())
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OS << ' ' << InstName;
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for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) {
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for (unsigned i = 0, e = Inst.getNumOperands(); i != e; ++i) {
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OS << "\n ";
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OS << "\n ";
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Inst.getOperand(i).print(OS, &MAI);
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Inst.getOperand(i).print(OS, &MAI);
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@ -8,7 +8,14 @@
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/MC/MCInstPrinter.h"
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#include "llvm/ADT/StringRef.h"
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using namespace llvm;
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using namespace llvm;
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MCInstPrinter::~MCInstPrinter() {
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MCInstPrinter::~MCInstPrinter() {
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}
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}
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/// getOpcodeName - Return the name of the specified opcode enum (e.g.
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/// "MOV32ri") or empty if we can't resolve it.
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StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
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return "";
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}
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@ -282,11 +282,11 @@ void X86MCCodeEmitter::EmitMemModRMByte(const MCInst &MI, unsigned Op,
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/// size, and 3) use of X86-64 extended registers.
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/// size, and 3) use of X86-64 extended registers.
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static unsigned DetermineREXPrefix(const MCInst &MI, unsigned TSFlags,
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static unsigned DetermineREXPrefix(const MCInst &MI, unsigned TSFlags,
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const TargetInstrDesc &Desc) {
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const TargetInstrDesc &Desc) {
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unsigned REX = 0;
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// Pseudo instructions shouldn't get here.
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assert((TSFlags & X86II::FormMask) != X86II::Pseudo &&
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"Can't encode pseudo instrs");
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// Pseudo instructions do not need REX prefix byte.
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unsigned REX = 0;
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if ((TSFlags & X86II::FormMask) == X86II::Pseudo)
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return 0;
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if (TSFlags & X86II::REX_W)
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if (TSFlags & X86II::REX_W)
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REX |= 1 << 3;
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REX |= 1 << 3;
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