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gn build: (manually) merge 51b4b17eb

Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.
This commit is contained in:
Nico Weber 2019-11-04 09:51:41 -05:00
parent 8912b9c60d
commit 148929db9f
4 changed files with 14 additions and 11 deletions

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@ -1,7 +1,10 @@
import("//llvm/utils/TableGen/tablegen.gni")
tablegen("AArch64GenAsmMatcher") {
visibility = [ ":AsmParser" ]
visibility = [
":AsmParser",
"//llvm/lib/Target/AArch64:LLVMAArch64CodeGen",
]
args = [ "-gen-asm-matcher" ]
td_file = "../AArch64.td"
}

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@ -1,11 +1,5 @@
import("//llvm/utils/TableGen/tablegen.gni")
tablegen("AArch64GenAsmMatcher") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [ "-gen-asm-matcher" ]
td_file = "AArch64.td"
}
tablegen("AArch64GenCallingConv") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [ "-gen-callingconv" ]
@ -53,7 +47,6 @@ tablegen("AArch64GenRegisterBank") {
static_library("LLVMAArch64CodeGen") {
deps = [
":AArch64GenAsmMatcher",
":AArch64GenCallingConv",
":AArch64GenDAGISel",
":AArch64GenFastISel",
@ -61,7 +54,9 @@ static_library("LLVMAArch64CodeGen") {
":AArch64GenGlobalISel",
":AArch64GenMCPseudoLowering",
":AArch64GenRegisterBank",
"AsmParser",
# See https://reviews.llvm.org/D69130
"AsmParser:AArch64GenAsmMatcher",
"MCTargetDesc",
"TargetInfo",
"Utils",

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@ -1,7 +1,10 @@
import("//llvm/utils/TableGen/tablegen.gni")
tablegen("RISCVGenAsmMatcher") {
visibility = [ ":AsmParser" ]
visibility = [
":AsmParser",
"//llvm/lib/Target/RISCV:LLVMRISCVCodeGen",
]
args = [ "-gen-asm-matcher" ]
td_file = "../RISCV.td"
}

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@ -45,7 +45,9 @@ static_library("LLVMRISCVCodeGen") {
":RISCVGenGlobalISel",
":RISCVGenMCPseudoLowering",
":RISCVGenRegisterBank",
"AsmParser",
# See https://reviews.llvm.org/D69130
"AsmParser:RISCVGenAsmMatcher",
"MCTargetDesc",
"TargetInfo",
"Utils",