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gn build: (manually) merge 51b4b17eb
Also reverts r353980 since that duplicated the GenAsmMatcher target for AArch64. Instead use visiblity.
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@ -1,7 +1,10 @@
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import("//llvm/utils/TableGen/tablegen.gni")
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tablegen("AArch64GenAsmMatcher") {
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visibility = [ ":AsmParser" ]
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visibility = [
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":AsmParser",
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"//llvm/lib/Target/AArch64:LLVMAArch64CodeGen",
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]
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args = [ "-gen-asm-matcher" ]
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td_file = "../AArch64.td"
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}
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@ -1,11 +1,5 @@
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import("//llvm/utils/TableGen/tablegen.gni")
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tablegen("AArch64GenAsmMatcher") {
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visibility = [ ":LLVMAArch64CodeGen" ]
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args = [ "-gen-asm-matcher" ]
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td_file = "AArch64.td"
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}
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tablegen("AArch64GenCallingConv") {
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visibility = [ ":LLVMAArch64CodeGen" ]
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args = [ "-gen-callingconv" ]
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@ -53,7 +47,6 @@ tablegen("AArch64GenRegisterBank") {
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static_library("LLVMAArch64CodeGen") {
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deps = [
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":AArch64GenAsmMatcher",
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":AArch64GenCallingConv",
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":AArch64GenDAGISel",
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":AArch64GenFastISel",
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@ -61,7 +54,9 @@ static_library("LLVMAArch64CodeGen") {
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":AArch64GenGlobalISel",
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":AArch64GenMCPseudoLowering",
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":AArch64GenRegisterBank",
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"AsmParser",
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# See https://reviews.llvm.org/D69130
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"AsmParser:AArch64GenAsmMatcher",
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"MCTargetDesc",
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"TargetInfo",
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"Utils",
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@ -1,7 +1,10 @@
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import("//llvm/utils/TableGen/tablegen.gni")
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tablegen("RISCVGenAsmMatcher") {
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visibility = [ ":AsmParser" ]
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visibility = [
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":AsmParser",
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"//llvm/lib/Target/RISCV:LLVMRISCVCodeGen",
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]
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args = [ "-gen-asm-matcher" ]
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td_file = "../RISCV.td"
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}
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@ -45,7 +45,9 @@ static_library("LLVMRISCVCodeGen") {
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":RISCVGenGlobalISel",
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":RISCVGenMCPseudoLowering",
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":RISCVGenRegisterBank",
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"AsmParser",
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# See https://reviews.llvm.org/D69130
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"AsmParser:RISCVGenAsmMatcher",
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"MCTargetDesc",
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"TargetInfo",
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"Utils",
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