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[PowerPC] Delete PPCMachObjectWriter and powerpc{,64}-apple-darwin
Reviewed By: #powerpc, sfertile Differential Revision: https://reviews.llvm.org/D75494
This commit is contained in:
Fangrui Song
parent
02300509f3
commit
14988e9953
@ -712,9 +712,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
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case Triple::ppc64:
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case Triple::ppc64:
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case Triple::ppc:
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case Triple::ppc:
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if (T.isOSDarwin())
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if (T.isOSAIX())
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return Triple::MachO;
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else if (T.isOSAIX())
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return Triple::XCOFF;
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return Triple::XCOFF;
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return Triple::ELF;
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return Triple::ELF;
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@ -6,7 +6,6 @@ add_llvm_component_library(LLVMPowerPCDesc
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PPCMCCodeEmitter.cpp
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PPCMCCodeEmitter.cpp
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PPCMCExpr.cpp
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PPCMCExpr.cpp
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PPCPredicates.cpp
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PPCPredicates.cpp
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PPCMachObjectWriter.cpp
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PPCELFObjectWriter.cpp
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PPCELFObjectWriter.cpp
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PPCXCOFFObjectWriter.cpp
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PPCXCOFFObjectWriter.cpp
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PPCELFStreamer.cpp
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PPCELFStreamer.cpp
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@ -200,19 +200,6 @@ public:
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// FIXME: This should be in a separate file.
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// FIXME: This should be in a separate file.
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namespace {
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namespace {
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class DarwinPPCAsmBackend : public PPCAsmBackend {
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public:
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DarwinPPCAsmBackend(const Target &T, const Triple &TT)
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: PPCAsmBackend(T, TT) {}
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override {
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uint32_t CPUType = cantFail(MachO::getCPUType(TT));
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uint32_t CPUSubType = cantFail(MachO::getCPUSubType(TT));
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return createPPCMachObjectWriter(TT.isArch64Bit(), CPUType, CPUSubType);
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}
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};
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class ELFPPCAsmBackend : public PPCAsmBackend {
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class ELFPPCAsmBackend : public PPCAsmBackend {
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public:
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public:
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ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
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ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {}
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@ -256,9 +243,6 @@ MCAsmBackend *llvm::createPPCAsmBackend(const Target &T,
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const MCRegisterInfo &MRI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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const MCTargetOptions &Options) {
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const Triple &TT = STI.getTargetTriple();
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const Triple &TT = STI.getTargetTriple();
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if (TT.isOSDarwin())
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return new DarwinPPCAsmBackend(T, TT);
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if (TT.isOSBinFormatXCOFF())
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if (TT.isOSBinFormatXCOFF())
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return new XCOFFPPCAsmBackend(T, TT);
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return new XCOFFPPCAsmBackend(T, TT);
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@ -1,380 +0,0 @@
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//===-- PPCMachObjectWriter.cpp - PPC Mach-O Writer -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCFixupKinds.h"
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/BinaryFormat/MachO.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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using namespace llvm;
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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bool recordScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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unsigned Log2Size, uint64_t &FixedValue);
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void RecordPPCRelocation(MachObjectWriter *Writer, const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue);
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public:
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PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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void recordRelocation(MachObjectWriter *Writer, MCAssembler &Asm,
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const MCAsmLayout &Layout, const MCFragment *Fragment,
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const MCFixup &Fixup, MCValue Target,
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uint64_t &FixedValue) override {
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if (Writer->is64Bit()) {
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report_fatal_error("Relocation emission for MachO/PPC64 unimplemented.");
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} else
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RecordPPCRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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FixedValue);
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}
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};
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}
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/// computes the log2 of the size of the relocation,
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/// used for relocation_info::r_length.
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static unsigned getFixupKindLog2Size(unsigned Kind) {
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switch (Kind) {
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default:
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report_fatal_error("log2size(FixupKind): Unhandled fixup kind!");
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case FK_PCRel_1:
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case FK_Data_1:
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return 0;
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case FK_PCRel_2:
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case FK_Data_2:
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return 1;
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case FK_PCRel_4:
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case PPC::fixup_ppc_brcond14:
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case PPC::fixup_ppc_half16:
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case PPC::fixup_ppc_br24:
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case FK_Data_4:
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return 2;
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case FK_PCRel_8:
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case FK_Data_8:
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return 3;
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}
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return 0;
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}
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/// Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
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/// Outline based on PPCELFObjectWriter::getRelocType().
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static unsigned getRelocType(const MCValue &Target,
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const MCFixupKind FixupKind, // from
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// Fixup.getKind()
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const bool IsPCRel) {
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const MCSymbolRefExpr::VariantKind Modifier =
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Target.isAbsolute() ? MCSymbolRefExpr::VK_None
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: Target.getSymA()->getKind();
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// determine the type of the relocation
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unsigned Type = MachO::GENERIC_RELOC_VANILLA;
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if (IsPCRel) { // relative to PC
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switch ((unsigned)FixupKind) {
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default:
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report_fatal_error("Unimplemented fixup kind (relative)");
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case PPC::fixup_ppc_br24:
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Type = MachO::PPC_RELOC_BR24; // R_PPC_REL24
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break;
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case PPC::fixup_ppc_brcond14:
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Type = MachO::PPC_RELOC_BR14;
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break;
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case PPC::fixup_ppc_half16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported modifier for half16 fixup");
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case MCSymbolRefExpr::VK_PPC_HA:
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Type = MachO::PPC_RELOC_HA16;
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break;
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case MCSymbolRefExpr::VK_PPC_LO:
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Type = MachO::PPC_RELOC_LO16;
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break;
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case MCSymbolRefExpr::VK_PPC_HI:
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Type = MachO::PPC_RELOC_HI16;
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break;
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}
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break;
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}
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} else {
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switch ((unsigned)FixupKind) {
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default:
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report_fatal_error("Unimplemented fixup kind (absolute)!");
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case PPC::fixup_ppc_half16:
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switch (Modifier) {
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default:
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llvm_unreachable("Unsupported modifier for half16 fixup");
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case MCSymbolRefExpr::VK_PPC_HA:
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Type = MachO::PPC_RELOC_HA16_SECTDIFF;
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break;
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case MCSymbolRefExpr::VK_PPC_LO:
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Type = MachO::PPC_RELOC_LO16_SECTDIFF;
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break;
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case MCSymbolRefExpr::VK_PPC_HI:
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Type = MachO::PPC_RELOC_HI16_SECTDIFF;
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break;
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}
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break;
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case FK_Data_4:
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break;
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case FK_Data_2:
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break;
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}
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}
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return Type;
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}
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static void makeRelocationInfo(MachO::any_relocation_info &MRE,
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const uint32_t FixupOffset, const uint32_t Index,
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const unsigned IsPCRel, const unsigned Log2Size,
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const unsigned IsExtern, const unsigned Type) {
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MRE.r_word0 = FixupOffset;
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// The bitfield offsets that work (as determined by trial-and-error)
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// are different than what is documented in the mach-o manuals.
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// This appears to be an endianness issue; reversing the order of the
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// documented bitfields in <llvm/BinaryFormat/MachO.h> fixes this (but
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// breaks x86/ARM assembly).
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MRE.r_word1 = ((Index << 8) | // was << 0
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(IsPCRel << 7) | // was << 24
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(Log2Size << 5) | // was << 25
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(IsExtern << 4) | // was << 27
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(Type << 0)); // was << 28
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}
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static void
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makeScatteredRelocationInfo(MachO::any_relocation_info &MRE,
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const uint32_t Addr, const unsigned Type,
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const unsigned Log2Size, const unsigned IsPCRel,
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const uint32_t Value2) {
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// For notes on bitfield positions and endianness, see:
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// https://developer.apple.com/library/mac/documentation/developertools/conceptual/MachORuntime/Reference/reference.html#//apple_ref/doc/uid/20001298-scattered_relocation_entry
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MRE.r_word0 = ((Addr << 0) | (Type << 24) | (Log2Size << 28) |
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(IsPCRel << 30) | MachO::R_SCATTERED);
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MRE.r_word1 = Value2;
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}
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/// Compute fixup offset (address).
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static uint32_t getFixupOffset(const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
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// On Mach-O, ppc_fixup_half16 relocations must refer to the
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// start of the instruction, not the second halfword, as ELF does
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if (Fixup.getTargetKind() == PPC::fixup_ppc_half16)
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FixupOffset &= ~uint32_t(3);
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return FixupOffset;
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}
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/// \return false if falling back to using non-scattered relocation,
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/// otherwise true for normal scattered relocation.
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/// based on X86MachObjectWriter::recordScatteredRelocation
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/// and ARMMachObjectWriter::recordScatteredRelocation
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bool PPCMachObjectWriter::recordScatteredRelocation(
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MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
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unsigned Log2Size, uint64_t &FixedValue) {
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// caller already computes these, can we just pass and reuse?
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const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
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const MCFixupKind FK = Fixup.getKind();
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const unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
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const unsigned Type = getRelocType(Target, FK, IsPCRel);
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// Is this a local or SECTDIFF relocation entry?
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// SECTDIFF relocation entries have symbol subtractions,
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// and require two entries, the first for the add-symbol value,
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// the second for the subtract-symbol value.
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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if (!A->getFragment())
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report_fatal_error("symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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uint32_t Value = Writer->getSymbolAddress(*A, Layout);
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uint64_t SecAddr = Writer->getSectionAddress(A->getFragment()->getParent());
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FixedValue += SecAddr;
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uint32_t Value2 = 0;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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const MCSymbol *SB = &B->getSymbol();
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if (!SB->getFragment())
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report_fatal_error("symbol '" + SB->getName() +
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"' can not be undefined in a subtraction expression");
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// FIXME: is Type correct? see include/llvm/BinaryFormat/MachO.h
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Value2 = Writer->getSymbolAddress(*SB, Layout);
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FixedValue -= Writer->getSectionAddress(SB->getFragment()->getParent());
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}
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// FIXME: does FixedValue get used??
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// Relocations are written out in reverse order, so the PAIR comes first.
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if (Type == MachO::PPC_RELOC_SECTDIFF ||
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Type == MachO::PPC_RELOC_HI16_SECTDIFF ||
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Type == MachO::PPC_RELOC_LO16_SECTDIFF ||
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Type == MachO::PPC_RELOC_HA16_SECTDIFF ||
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Type == MachO::PPC_RELOC_LO14_SECTDIFF ||
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Type == MachO::PPC_RELOC_LOCAL_SECTDIFF) {
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// X86 had this piece, but ARM does not
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// If the offset is too large to fit in a scattered relocation,
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// we're hosed. It's an unfortunate limitation of the MachO format.
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if (FixupOffset > 0xffffff) {
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char Buffer[32];
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format("0x%x", FixupOffset).print(Buffer, sizeof(Buffer));
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Asm.getContext().reportError(Fixup.getLoc(),
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Twine("Section too large, can't encode "
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"r_address (") +
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Buffer + ") into 24 bits of scattered "
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"relocation entry.");
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return false;
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}
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// Is this supposed to follow MCTarget/PPCAsmBackend.cpp:adjustFixupValue()?
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// see PPCMCExpr::evaluateAsRelocatableImpl()
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uint32_t other_half = 0;
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switch (Type) {
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case MachO::PPC_RELOC_LO16_SECTDIFF:
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other_half = (FixedValue >> 16) & 0xffff;
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// applyFixupOffset longer extracts the high part because it now assumes
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// this was already done.
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// It looks like this is not true for the FixedValue needed with Mach-O
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// relocs.
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// So we need to adjust FixedValue again here.
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FixedValue &= 0xffff;
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break;
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case MachO::PPC_RELOC_HA16_SECTDIFF:
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other_half = FixedValue & 0xffff;
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FixedValue =
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((FixedValue >> 16) + ((FixedValue & 0x8000) ? 1 : 0)) & 0xffff;
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break;
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case MachO::PPC_RELOC_HI16_SECTDIFF:
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other_half = FixedValue & 0xffff;
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FixedValue = (FixedValue >> 16) & 0xffff;
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break;
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default:
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llvm_unreachable("Invalid PPC scattered relocation type.");
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break;
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}
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MachO::any_relocation_info MRE;
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makeScatteredRelocationInfo(MRE, other_half, MachO::GENERIC_RELOC_PAIR,
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Log2Size, IsPCRel, Value2);
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Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
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} else {
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// If the offset is more than 24-bits, it won't fit in a scattered
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// relocation offset field, so we fall back to using a non-scattered
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// relocation. This is a bit risky, as if the offset reaches out of
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// the block and the linker is doing scattered loading on this
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// symbol, things can go badly.
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|
||||||
//
|
|
||||||
// Required for 'as' compatibility.
|
|
||||||
if (FixupOffset > 0xffffff)
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
MachO::any_relocation_info MRE;
|
|
||||||
makeScatteredRelocationInfo(MRE, FixupOffset, Type, Log2Size, IsPCRel, Value);
|
|
||||||
Writer->addRelocation(nullptr, Fragment->getParent(), MRE);
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
|
|
||||||
// see PPCELFObjectWriter for a general outline of cases
|
|
||||||
void PPCMachObjectWriter::RecordPPCRelocation(
|
|
||||||
MachObjectWriter *Writer, const MCAssembler &Asm, const MCAsmLayout &Layout,
|
|
||||||
const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target,
|
|
||||||
uint64_t &FixedValue) {
|
|
||||||
const MCFixupKind FK = Fixup.getKind(); // unsigned
|
|
||||||
const unsigned Log2Size = getFixupKindLog2Size(FK);
|
|
||||||
const bool IsPCRel = Writer->isFixupKindPCRel(Asm, FK);
|
|
||||||
const unsigned RelocType = getRelocType(Target, FK, IsPCRel);
|
|
||||||
|
|
||||||
// If this is a difference or a defined symbol plus an offset, then we need a
|
|
||||||
// scattered relocation entry. Differences always require scattered
|
|
||||||
// relocations.
|
|
||||||
if (Target.getSymB() &&
|
|
||||||
// Q: are branch targets ever scattered?
|
|
||||||
RelocType != MachO::PPC_RELOC_BR24 &&
|
|
||||||
RelocType != MachO::PPC_RELOC_BR14) {
|
|
||||||
recordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
|
|
||||||
Log2Size, FixedValue);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
// this doesn't seem right for RIT_PPC_BR24
|
|
||||||
// Get the symbol data, if any.
|
|
||||||
const MCSymbol *A = nullptr;
|
|
||||||
if (Target.getSymA())
|
|
||||||
A = &Target.getSymA()->getSymbol();
|
|
||||||
|
|
||||||
// See <reloc.h>.
|
|
||||||
const uint32_t FixupOffset = getFixupOffset(Layout, Fragment, Fixup);
|
|
||||||
unsigned Index = 0;
|
|
||||||
unsigned Type = RelocType;
|
|
||||||
|
|
||||||
const MCSymbol *RelSymbol = nullptr;
|
|
||||||
if (Target.isAbsolute()) { // constant
|
|
||||||
// SymbolNum of 0 indicates the absolute section.
|
|
||||||
//
|
|
||||||
// FIXME: Currently, these are never generated (see code below). I cannot
|
|
||||||
// find a case where they are actually emitted.
|
|
||||||
report_fatal_error("FIXME: relocations to absolute targets "
|
|
||||||
"not yet implemented");
|
|
||||||
// the above line stolen from ARM, not sure
|
|
||||||
} else {
|
|
||||||
// Resolve constant variables.
|
|
||||||
if (A->isVariable()) {
|
|
||||||
int64_t Res;
|
|
||||||
if (A->getVariableValue()->evaluateAsAbsolute(
|
|
||||||
Res, Layout, Writer->getSectionAddressMap())) {
|
|
||||||
FixedValue = Res;
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
// Check whether we need an external or internal relocation.
|
|
||||||
if (Writer->doesSymbolRequireExternRelocation(*A)) {
|
|
||||||
RelSymbol = A;
|
|
||||||
// For external relocations, make sure to offset the fixup value to
|
|
||||||
// compensate for the addend of the symbol address, if it was
|
|
||||||
// undefined. This occurs with weak definitions, for example.
|
|
||||||
if (!A->isUndefined())
|
|
||||||
FixedValue -= Layout.getSymbolOffset(*A);
|
|
||||||
} else {
|
|
||||||
// The index is the section ordinal (1-based).
|
|
||||||
const MCSection &Sec = A->getSection();
|
|
||||||
Index = Sec.getOrdinal() + 1;
|
|
||||||
FixedValue += Writer->getSectionAddress(&Sec);
|
|
||||||
}
|
|
||||||
if (IsPCRel)
|
|
||||||
FixedValue -= Writer->getSectionAddress(Fragment->getParent());
|
|
||||||
}
|
|
||||||
|
|
||||||
// struct relocation_info (8 bytes)
|
|
||||||
MachO::any_relocation_info MRE;
|
|
||||||
makeRelocationInfo(MRE, FixupOffset, Index, IsPCRel, Log2Size, false, Type);
|
|
||||||
Writer->addRelocation(RelSymbol, Fragment->getParent(), MRE);
|
|
||||||
}
|
|
||||||
|
|
||||||
std::unique_ptr<MCObjectTargetWriter>
|
|
||||||
llvm::createPPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
|
|
||||||
uint32_t CPUSubtype) {
|
|
||||||
return std::make_unique<PPCMachObjectWriter>(Is64Bit, CPUType, CPUSubtype);
|
|
||||||
}
|
|
||||||
@ -58,8 +58,6 @@ TEST(MachOTest, CPUType) {
|
|||||||
CHECK_CPUTYPE("arm64-apple-darwin", MachO::CPU_TYPE_ARM64);
|
CHECK_CPUTYPE("arm64-apple-darwin", MachO::CPU_TYPE_ARM64);
|
||||||
CHECK_CPUTYPE("arm64e-apple-darwin", MachO::CPU_TYPE_ARM64);
|
CHECK_CPUTYPE("arm64e-apple-darwin", MachO::CPU_TYPE_ARM64);
|
||||||
CHECK_CPUTYPE("arm64_32-apple-darwin", MachO::CPU_TYPE_ARM64_32);
|
CHECK_CPUTYPE("arm64_32-apple-darwin", MachO::CPU_TYPE_ARM64_32);
|
||||||
CHECK_CPUTYPE("powerpc-apple-darwin", MachO::CPU_TYPE_POWERPC);
|
|
||||||
CHECK_CPUTYPE("powerpc64-apple-darwin", MachO::CPU_TYPE_POWERPC64);
|
|
||||||
|
|
||||||
{
|
{
|
||||||
// Not a mach-o.
|
// Not a mach-o.
|
||||||
@ -101,8 +99,6 @@ TEST(MachOTest, CPUSubType) {
|
|||||||
CHECK_CPUSUBTYPE("arm64-apple-darwin", MachO::CPU_SUBTYPE_ARM64_ALL);
|
CHECK_CPUSUBTYPE("arm64-apple-darwin", MachO::CPU_SUBTYPE_ARM64_ALL);
|
||||||
CHECK_CPUSUBTYPE("arm64e-apple-darwin", MachO::CPU_SUBTYPE_ARM64E);
|
CHECK_CPUSUBTYPE("arm64e-apple-darwin", MachO::CPU_SUBTYPE_ARM64E);
|
||||||
CHECK_CPUSUBTYPE("arm64_32-apple-darwin", MachO::CPU_SUBTYPE_ARM64_32_V8);
|
CHECK_CPUSUBTYPE("arm64_32-apple-darwin", MachO::CPU_SUBTYPE_ARM64_32_V8);
|
||||||
CHECK_CPUSUBTYPE("powerpc-apple-darwin", MachO::CPU_SUBTYPE_POWERPC_ALL);
|
|
||||||
CHECK_CPUSUBTYPE("powerpc64-apple-darwin", MachO::CPU_SUBTYPE_POWERPC_ALL);
|
|
||||||
|
|
||||||
{
|
{
|
||||||
// Not a mach-o.
|
// Not a mach-o.
|
||||||
|
|||||||
@ -58,7 +58,6 @@ static_library("MCTargetDesc") {
|
|||||||
"PPCMCCodeEmitter.cpp",
|
"PPCMCCodeEmitter.cpp",
|
||||||
"PPCMCExpr.cpp",
|
"PPCMCExpr.cpp",
|
||||||
"PPCMCTargetDesc.cpp",
|
"PPCMCTargetDesc.cpp",
|
||||||
"PPCMachObjectWriter.cpp",
|
|
||||||
"PPCPredicates.cpp",
|
"PPCPredicates.cpp",
|
||||||
"PPCXCOFFObjectWriter.cpp",
|
"PPCXCOFFObjectWriter.cpp",
|
||||||
]
|
]
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user