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Convert Legalize to use the APInt form of ComputeMaskedBits.

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llvm-svn: 47383
This commit is contained in:
Dan Gohman 2008-02-20 16:57:27 +00:00
parent 48d03d5a2d
commit 149903436b
2 changed files with 19 additions and 14 deletions
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10
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
View File

@ -5027,6 +5027,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
MVT::ValueType NVT = TLI.getTypeToTransformTo(Op.getValueType()); MVT::ValueType NVT = TLI.getTypeToTransformTo(Op.getValueType());
SDOperand ShAmt = LegalizeOp(Amt); SDOperand ShAmt = LegalizeOp(Amt);
MVT::ValueType ShTy = ShAmt.getValueType(); MVT::ValueType ShTy = ShAmt.getValueType();
unsigned ShBits = MVT::getSizeInBits(ShTy);
unsigned VTBits = MVT::getSizeInBits(Op.getValueType()); unsigned VTBits = MVT::getSizeInBits(Op.getValueType());
unsigned NVTBits = MVT::getSizeInBits(NVT); unsigned NVTBits = MVT::getSizeInBits(NVT);
@ -5096,15 +5097,16 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
// Okay, the shift amount isn't constant. However, if we can tell that it is // Okay, the shift amount isn't constant. However, if we can tell that it is
// >= 32 or < 32, we can still simplify it, without knowing the actual value. // >= 32 or < 32, we can still simplify it, without knowing the actual value.
uint64_t Mask = NVTBits, KnownZero, KnownOne; APInt Mask = APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVTBits));
APInt KnownZero, KnownOne;
DAG.ComputeMaskedBits(Amt, Mask, KnownZero, KnownOne); DAG.ComputeMaskedBits(Amt, Mask, KnownZero, KnownOne);
// If we know that the high bit of the shift amount is one, then we can do // If we know that the high bit of the shift amount is one, then we can do
// this as a couple of simple shifts. // this as a couple of simple shifts.
if (KnownOne & Mask) { if (KnownOne.intersects(Mask)) {
// Mask out the high bit, which we know is set. // Mask out the high bit, which we know is set.
Amt = DAG.getNode(ISD::AND, Amt.getValueType(), Amt, Amt = DAG.getNode(ISD::AND, Amt.getValueType(), Amt,
DAG.getConstant(NVTBits-1, Amt.getValueType())); DAG.getConstant(~Mask, Amt.getValueType()));
// Expand the incoming operand to be shifted, so that we have its parts // Expand the incoming operand to be shifted, so that we have its parts
SDOperand InL, InH; SDOperand InL, InH;
@ -5128,7 +5130,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt,
// If we know that the high bit of the shift amount is zero, then we can do // If we know that the high bit of the shift amount is zero, then we can do
// this as a couple of simple shifts. // this as a couple of simple shifts.
if (KnownZero & Mask) { if (KnownZero.intersects(Mask)) {
// Compute 32-amt. // Compute 32-amt.
SDOperand Amt2 = DAG.getNode(ISD::SUB, Amt.getValueType(), SDOperand Amt2 = DAG.getNode(ISD::SUB, Amt.getValueType(),
DAG.getConstant(NVTBits, Amt.getValueType()), DAG.getConstant(NVTBits, Amt.getValueType()),

23
lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
View File

@ -748,12 +748,16 @@ void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
/// shift amount. /// shift amount.
bool DAGTypeLegalizer:: bool DAGTypeLegalizer::
ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) { ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
SDOperand Amt = N->getOperand(1);
MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0)); MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
MVT::ValueType ShTy = Amt.getValueType();
MVT::ValueType ShBits = MVT::getSizeInBits(ShTy);
unsigned NVTBits = MVT::getSizeInBits(NVT); unsigned NVTBits = MVT::getSizeInBits(NVT);
assert(!(NVTBits & (NVTBits - 1)) && assert(isPowerOf2_32(NVTBits) &&
"Expanded integer type size not a power of two!"); "Expanded integer type size not a power of two!");
uint64_t HighBitMask = NVTBits, KnownZero, KnownOne; APInt HighBitMask = APInt::getHighBitsSet(ShBits, ShBits - Log2_32(NVTBits));
APInt KnownZero, KnownOne;
DAG.ComputeMaskedBits(N->getOperand(1), HighBitMask, KnownZero, KnownOne); DAG.ComputeMaskedBits(N->getOperand(1), HighBitMask, KnownZero, KnownOne);
// If we don't know anything about the high bit, exit. // If we don't know anything about the high bit, exit.
@ -763,14 +767,13 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
// Get the incoming operand to be shifted. // Get the incoming operand to be shifted.
SDOperand InL, InH; SDOperand InL, InH;
GetExpandedOp(N->getOperand(0), InL, InH); GetExpandedOp(N->getOperand(0), InL, InH);
SDOperand Amt = N->getOperand(1);
// If we know that the high bit of the shift amount is one, then we can do // If we know that the high bit of the shift amount is one, then we can do
// this as a couple of simple shifts. // this as a couple of simple shifts.
if (KnownOne & HighBitMask) { if (KnownOne.intersects(HighBitMask)) {
// Mask out the high bit, which we know is set. // Mask out the high bit, which we know is set.
Amt = DAG.getNode(ISD::AND, Amt.getValueType(), Amt, Amt = DAG.getNode(ISD::AND, ShTy, Amt,
DAG.getConstant(NVTBits-1, Amt.getValueType())); DAG.getConstant(~HighBitMask, ShTy));
switch (N->getOpcode()) { switch (N->getOpcode()) {
default: assert(0 && "Unknown shift"); default: assert(0 && "Unknown shift");
@ -784,7 +787,7 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
return true; return true;
case ISD::SRA: case ISD::SRA:
Hi = DAG.getNode(ISD::SRA, NVT, InH, // Sign extend high part. Hi = DAG.getNode(ISD::SRA, NVT, InH, // Sign extend high part.
DAG.getConstant(NVTBits-1, Amt.getValueType())); DAG.getConstant(NVTBits-1, ShTy));
Lo = DAG.getNode(ISD::SRA, NVT, InH, Amt); // Lo part from Hi part. Lo = DAG.getNode(ISD::SRA, NVT, InH, Amt); // Lo part from Hi part.
return true; return true;
} }
@ -792,11 +795,11 @@ ExpandShiftWithKnownAmountBit(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
// If we know that the high bit of the shift amount is zero, then we can do // If we know that the high bit of the shift amount is zero, then we can do
// this as a couple of simple shifts. // this as a couple of simple shifts.
assert((KnownZero & HighBitMask) && "Bad mask computation above"); assert(KnownZero.intersects(HighBitMask) && "Bad mask computation above");
// Compute 32-amt. // Compute 32-amt.
SDOperand Amt2 = DAG.getNode(ISD::SUB, Amt.getValueType(), SDOperand Amt2 = DAG.getNode(ISD::SUB, ShTy,
DAG.getConstant(NVTBits, Amt.getValueType()), DAG.getConstant(NVTBits, ShTy),
Amt); Amt);
unsigned Op1, Op2; unsigned Op1, Op2;
switch (N->getOpcode()) { switch (N->getOpcode()) {