RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
Code Issues Projects Releases Wiki Activity

Teach instcombine to look for booleans in wider integers when it encounters a

Browse Source 
zext(icmp). It may be able to optimize that away. This fixes one of the cases
in PR5438.

llvm-svn: 88830
This commit is contained in:
Nick Lewycky 2009-11-15 05:55:17 +00:00
parent 4d30650e61
commit 14a2122db3
2 changed files with 56 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
lib/Transforms/Scalar/InstructionCombining.cpp
View File

@ -8539,6 +8539,34 @@ Instruction *InstCombiner::transformZExtICmp(ICmpInst *ICI, Instruction &CI,
}
}
// icmp ne A, B is equal to xor A, B when A and B only really have one bit.
// It is also profitable to transform icmp eq into not(xor(A, B)) because that
// may lead to additional simplifications.
if (CI.getType() == ICI->getOperand(0)->getType()) {
if (const IntegerType *ITy = dyn_cast<IntegerType>(CI.getType())) {
Value *LHS = ICI->getOperand(0);
Value *RHS = ICI->getOperand(1);
uint32_t BitWidth = ITy->getBitWidth();
APInt KnownZeroLHS(BitWidth, 0), KnownOneLHS(BitWidth, 0);
APInt KnownZeroRHS(BitWidth, 0), KnownOneRHS(BitWidth, 0);
APInt TypeMask(APInt::getAllOnesValue(BitWidth));
ComputeMaskedBits(LHS, TypeMask, KnownZeroLHS, KnownOneLHS);
ComputeMaskedBits(RHS, TypeMask, KnownZeroRHS, KnownOneRHS);
if (KnownZeroLHS.countLeadingOnes() == BitWidth-1 &&
KnownZeroRHS.countLeadingOnes() == BitWidth-1) {
if (!DoXform) return ICI;
Value *Xor = Builder->CreateXor(LHS, RHS);
if (ICI->isTrueWhenEqual())
Xor = Builder->CreateXor(Xor, ConstantInt::get(ITy, 1));
Xor->takeName(ICI);
return ReplaceInstUsesWith(CI, Xor);
}
}
}
return 0;
}

28
test/Transforms/InstCombine/compare-signs.ll Normal file
View File

@ -0,0 +1,28 @@
; RUN: opt %S -instcombine -S | FileCheck %S
; PR5438
; TODO: This should also optimize down.
;define i32 @bar(i32 %a, i32 %b) nounwind readnone {
;entry:
; %0 = icmp sgt i32 %a, -1 ; <i1> [#uses=1]
; %1 = icmp slt i32 %b, 0 ; <i1> [#uses=1]
; %2 = xor i1 %1, %0 ; <i1> [#uses=1]
; %3 = zext i1 %2 to i32 ; <i32> [#uses=1]
; ret i32 %3
;}
define i32 @qaz(i32 %a, i32 %b) nounwind readnone {
; CHECK: @qaz
entry:
; CHECK: xor i32 %a, %b
; CHECK; lshr i32 %0, 31
; CHECK: xor i32 %1, 1
%0 = lshr i32 %a, 31 ; <i32> [#uses=1]
%1 = lshr i32 %b, 31 ; <i32> [#uses=1]
%2 = icmp eq i32 %0, %1 ; <i1> [#uses=1]
%3 = zext i1 %2 to i32 ; <i32> [#uses=1]
ret i32 %3
; CHECK-NOT: icmp
; CHECK-NOT: zext
; CHECK: ret i32 %2
}