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early exits -> less indenting; NFCI
llvm-svn: 241716
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@ -8406,30 +8406,29 @@ SDValue DAGCombiner::visitFREM(SDNode *N) {
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}
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}
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SDValue DAGCombiner::visitFSQRT(SDNode *N) {
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SDValue DAGCombiner::visitFSQRT(SDNode *N) {
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if (DAG.getTarget().Options.UnsafeFPMath &&
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if (!DAG.getTarget().Options.UnsafeFPMath || TLI.isFsqrtCheap())
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!TLI.isFsqrtCheap()) {
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return SDValue();
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// Compute this as X * (1/sqrt(X)) = X * (X ** -0.5)
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if (SDValue RV = BuildRsqrtEstimate(N->getOperand(0))) {
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EVT VT = RV.getValueType();
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SDLoc DL(N);
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RV = DAG.getNode(ISD::FMUL, DL, VT, N->getOperand(0), RV);
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AddToWorklist(RV.getNode());
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// Unfortunately, RV is now NaN if the input was exactly 0.
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// Compute this as X * (1/sqrt(X)) = X * (X ** -0.5)
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// Select out this case and force the answer to 0.
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SDValue RV = BuildRsqrtEstimate(N->getOperand(0));
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SDValue Zero = DAG.getConstantFP(0.0, DL, VT);
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if (!RV)
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SDValue ZeroCmp =
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return SDValue();
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DAG.getSetCC(DL, TLI.getSetCCResultType(*DAG.getContext(), VT),
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N->getOperand(0), Zero, ISD::SETEQ);
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EVT VT = RV.getValueType();
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AddToWorklist(ZeroCmp.getNode());
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SDLoc DL(N);
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AddToWorklist(RV.getNode());
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RV = DAG.getNode(ISD::FMUL, DL, VT, N->getOperand(0), RV);
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AddToWorklist(RV.getNode());
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RV = DAG.getNode(VT.isVector() ? ISD::VSELECT : ISD::SELECT,
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// Unfortunately, RV is now NaN if the input was exactly 0.
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DL, VT, ZeroCmp, Zero, RV);
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// Select out this case and force the answer to 0.
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return RV;
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SDValue Zero = DAG.getConstantFP(0.0, DL, VT);
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}
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EVT CCVT = TLI.getSetCCResultType(*DAG.getContext(), VT);
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}
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SDValue ZeroCmp = DAG.getSetCC(DL, CCVT, N->getOperand(0), Zero, ISD::SETEQ);
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return SDValue();
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AddToWorklist(ZeroCmp.getNode());
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AddToWorklist(RV.getNode());
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return DAG.getNode(VT.isVector() ? ISD::VSELECT : ISD::SELECT, DL, VT,
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ZeroCmp, Zero, RV);
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}
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}
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SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
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SDValue DAGCombiner::visitFCOPYSIGN(SDNode *N) {
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