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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 11:13:28 +01:00

Convert another llc -filetype=obj test.

llvm-svn: 193547
This commit is contained in:
Rafael Espindola 2013-10-28 22:11:47 +00:00
parent 9dbb5cd655
commit 1530a2a292
2 changed files with 61 additions and 34 deletions

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@ -1,34 +0,0 @@
; RUN: llc -mcpu=pwr7 -O0 -filetype=obj -relocation-model=pic %s -o - | \
; RUN: llvm-readobj -r | FileCheck %s
; Test correct relocation generation for thread-local storage using
; the local dynamic model.
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
@a = hidden thread_local global i32 0, align 4
define signext i32 @main() nounwind {
entry:
%retval = alloca i32, align 4
store i32 0, i32* %retval
%0 = load i32* @a, align 4
ret i32 %0
}
; Verify generation of R_PPC64_GOT_TLSLD16_HA, R_PPC64_GOT_TLSLD16_LO,
; R_PPC64_TLSLD, R_PPC64_DTPREL16_HA, and R_PPC64_DTPREL16_LO for
; accessing external variable a, and R_PPC64_REL24 for the call to
; __tls_get_addr.
;
; CHECK: Relocations [
; CHECK: Section (2) .rela.text {
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSLD a
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_HA a
; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_LO a
; CHECK: }
; CHECK: ]

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// RUN: llvm-mc -triple=powerpc64-pc-linux -filetype=obj %s -o - | \
// RUN: llvm-readobj -r | FileCheck %s
// Test correct relocation generation for thread-local storage using
// the local dynamic model.
.file "/home/espindola/llvm/llvm/test/CodeGen/PowerPC/tls-ld-obj.ll"
.text
.globl main
.align 2
.type main,@function
.section .opd,"aw",@progbits
main: # @main
.align 3
.quad .L.main
.quad .TOC.@tocbase
.quad 0
.text
.L.main:
# BB#0: # %entry
addis 3, 2, a@got@tlsld@ha
addi 3, 3, a@got@tlsld@l
li 4, 0
bl __tls_get_addr(a@tlsld)
nop
stw 4, -4(1)
addis 3, 3, a@dtprel@ha
addi 3, 3, a@dtprel@l
lwz 4, 0(3)
extsw 3, 4
blr
.long 0
.quad 0
.Ltmp0:
.size main, .Ltmp0-.L.main
.hidden a # @a
.type a,@object
.section .tbss,"awT",@nobits
.globl a
.align 2
a:
.long 0 # 0x0
.size a, 4
// Verify generation of R_PPC64_GOT_TLSLD16_HA, R_PPC64_GOT_TLSLD16_LO,
// R_PPC64_TLSLD, R_PPC64_DTPREL16_HA, and R_PPC64_DTPREL16_LO for
// accessing external variable a, and R_PPC64_REL24 for the call to
// __tls_get_addr.
//
// CHECK: Relocations [
// CHECK: Section (2) .rela.text {
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSLD a
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_HA a
// CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_LO a
// CHECK: }
// CHECK: ]