RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
Code Issues Projects Releases Wiki Activity

A few 80-col violations.

Browse Source 
llvm-svn: 141988
This commit is contained in:
Evan Cheng 2011-10-14 20:36:23 +00:00
parent 8a401b97ea
commit 15ab434f80
2 changed files with 10 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/CodeGen/PrologEpilogInserter.cpp
View File

@ -55,7 +55,8 @@ INITIALIZE_PASS_END(PEI, "prologepilog",
STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered"); STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered");
STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged"); STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
STATISTIC(NumBytesStackSpace, "Number of bytes used for stack in all functions"); STATISTIC(NumBytesStackSpace,
"Number of bytes used for stack in all functions");
/// createPrologEpilogCodeInserter - This function returns a pass that inserts /// createPrologEpilogCodeInserter - This function returns a pass that inserts
/// prolog and epilog code, and eliminates abstract frame references. /// prolog and epilog code, and eliminates abstract frame references.

12
lib/Target/X86/X86TargetMachine.cpp
View File

@ -34,11 +34,14 @@ X86_32TargetMachine::X86_32TargetMachine(const Target &T, StringRef TT,
Reloc::Model RM, CodeModel::Model CM) Reloc::Model RM, CodeModel::Model CM)
: X86TargetMachine(T, TT, CPU, FS, RM, CM, false), : X86TargetMachine(T, TT, CPU, FS, RM, CM, false),
DataLayout(getSubtargetImpl()->isTargetDarwin() ? DataLayout(getSubtargetImpl()->isTargetDarwin() ?
"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32-S128" : "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-"
"n8:16:32-S128" :
(getSubtargetImpl()->isTargetCygMing() || (getSubtargetImpl()->isTargetCygMing() ||
getSubtargetImpl()->isTargetWindows()) ? getSubtargetImpl()->isTargetWindows()) ?
"e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-n8:16:32-S32" : "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-f128:128:128-"
"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-n8:16:32-S128"), "n8:16:32-S32" :
"e-p:32:32-f64:32:64-i64:32:64-f80:32:32-f128:128:128-"
"n8:16:32-S128"),
InstrInfo(*this), InstrInfo(*this),
TSInfo(*this), TSInfo(*this),
TLInfo(*this), TLInfo(*this),
@ -50,7 +53,8 @@ X86_64TargetMachine::X86_64TargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS, StringRef CPU, StringRef FS,
Reloc::Model RM, CodeModel::Model CM) Reloc::Model RM, CodeModel::Model CM)
: X86TargetMachine(T, TT, CPU, FS, RM, CM, true), : X86TargetMachine(T, TT, CPU, FS, RM, CM, true),
DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64-S128"), DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-"
"n8:16:32:64-S128"),
InstrInfo(*this), InstrInfo(*this),
TSInfo(*this), TSInfo(*this),
TLInfo(*this), TLInfo(*this),