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https://github.com/RPCS3/llvm-mirror.git
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AMDGPU: Enable InferAddressSpaces
llvm-svn: 294408
This commit is contained in:
Matt Arsenault
parent
5eaada1e12
commit
15bde0a3d5
@ -495,6 +495,7 @@ void AMDGPUPassConfig::addIRPasses() {
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addPass(createAMDGPUOpenCLImageTypeLoweringPass());
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if (TM.getOptLevel() > CodeGenOpt::None) {
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addPass(createInferAddressSpacesPass());
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addPass(createAMDGPUPromoteAlloca(&TM));
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if (EnableSROA)
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@ -140,7 +140,7 @@ define void @use_flat_to_constant_addrspacecast(i32 addrspace(4)* %ptr) #0 {
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; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]]
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define void @cast_0_group_to_flat_addrspacecast() #0 {
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%cast = addrspacecast i32 addrspace(3)* null to i32 addrspace(4)*
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store i32 7, i32 addrspace(4)* %cast
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store volatile i32 7, i32 addrspace(4)* %cast
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ret void
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}
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@ -150,7 +150,7 @@ define void @cast_0_group_to_flat_addrspacecast() #0 {
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; HSA: ds_write_b32 [[PTR]], [[K]]
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define void @cast_0_flat_to_group_addrspacecast() #0 {
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%cast = addrspacecast i32 addrspace(4)* null to i32 addrspace(3)*
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store i32 7, i32 addrspace(3)* %cast
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store volatile i32 7, i32 addrspace(3)* %cast
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ret void
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}
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@ -161,7 +161,7 @@ define void @cast_0_flat_to_group_addrspacecast() #0 {
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; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]]
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define void @cast_neg1_group_to_flat_addrspacecast() #0 {
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%cast = addrspacecast i32 addrspace(3)* inttoptr (i32 -1 to i32 addrspace(3)*) to i32 addrspace(4)*
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store i32 7, i32 addrspace(4)* %cast
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store volatile i32 7, i32 addrspace(4)* %cast
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ret void
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}
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@ -171,7 +171,7 @@ define void @cast_neg1_group_to_flat_addrspacecast() #0 {
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; HSA: ds_write_b32 [[PTR]], [[K]]
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define void @cast_neg1_flat_to_group_addrspacecast() #0 {
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%cast = addrspacecast i32 addrspace(4)* inttoptr (i64 -1 to i32 addrspace(4)*) to i32 addrspace(3)*
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store i32 7, i32 addrspace(3)* %cast
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store volatile i32 7, i32 addrspace(3)* %cast
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ret void
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}
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@ -183,7 +183,7 @@ define void @cast_neg1_flat_to_group_addrspacecast() #0 {
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; HSA: flat_store_dword v{{\[}}[[LO]]:[[HI]]{{\]}}, v[[K]]
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define void @cast_0_private_to_flat_addrspacecast() #0 {
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%cast = addrspacecast i32* null to i32 addrspace(4)*
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store i32 7, i32 addrspace(4)* %cast
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store volatile i32 7, i32 addrspace(4)* %cast
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ret void
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}
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@ -193,7 +193,7 @@ define void @cast_0_private_to_flat_addrspacecast() #0 {
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; HSA: buffer_store_dword [[K]], [[PTR]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen
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define void @cast_0_flat_to_private_addrspacecast() #0 {
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%cast = addrspacecast i32 addrspace(4)* null to i32 addrspace(0)*
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store i32 7, i32* %cast
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store volatile i32 7, i32* %cast
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ret void
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}
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@ -218,7 +218,7 @@ global:
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end:
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%fptr = phi i32 addrspace(4)* [ %flat_local, %local ], [ %flat_global, %global ]
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store i32 %x, i32 addrspace(4)* %fptr, align 4
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store volatile i32 %x, i32 addrspace(4)* %fptr, align 4
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; %val = load i32, i32 addrspace(4)* %fptr, align 4
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; store i32 %val, i32 addrspace(1)* %out, align 4
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ret void
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@ -237,11 +237,11 @@ define void @store_flat_scratch(i32 addrspace(1)* noalias %out, i32) #0 {
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%x = call i32 @llvm.amdgcn.workitem.id.x() #2
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%pptr = getelementptr i32, i32* %alloca, i32 %x
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%fptr = addrspacecast i32* %pptr to i32 addrspace(4)*
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store i32 %x, i32 addrspace(4)* %fptr
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store volatile i32 %x, i32 addrspace(4)* %fptr
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; Dummy call
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call void @llvm.amdgcn.s.barrier() #1
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%reload = load i32, i32 addrspace(4)* %fptr, align 4
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store i32 %reload, i32 addrspace(1)* %out, align 4
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%reload = load volatile i32, i32 addrspace(4)* %fptr, align 4
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store volatile i32 %reload, i32 addrspace(1)* %out, align 4
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ret void
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}
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@ -19,7 +19,7 @@
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; CHECK: flat_store_dword v{{\[}}[[LO_VREG]]:[[HI_VREG]]{{\]}}, v[[DATA]]
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define void @store_flat_i32(i32 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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store i32 %x, i32 addrspace(4)* %fptr, align 4
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store volatile i32 %x, i32 addrspace(4)* %fptr, align 4
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ret void
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}
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@ -27,7 +27,7 @@ define void @store_flat_i32(i32 addrspace(1)* %gptr, i32 %x) #0 {
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; CHECK: flat_store_dwordx2
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define void @store_flat_i64(i64 addrspace(1)* %gptr, i64 %x) #0 {
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%fptr = addrspacecast i64 addrspace(1)* %gptr to i64 addrspace(4)*
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store i64 %x, i64 addrspace(4)* %fptr, align 8
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store volatile i64 %x, i64 addrspace(4)* %fptr, align 8
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ret void
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}
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@ -35,7 +35,7 @@ define void @store_flat_i64(i64 addrspace(1)* %gptr, i64 %x) #0 {
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; CHECK: flat_store_dwordx4
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define void @store_flat_v4i32(<4 x i32> addrspace(1)* %gptr, <4 x i32> %x) #0 {
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%fptr = addrspacecast <4 x i32> addrspace(1)* %gptr to <4 x i32> addrspace(4)*
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store <4 x i32> %x, <4 x i32> addrspace(4)* %fptr, align 16
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store volatile <4 x i32> %x, <4 x i32> addrspace(4)* %fptr, align 16
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ret void
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}
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@ -44,7 +44,7 @@ define void @store_flat_v4i32(<4 x i32> addrspace(1)* %gptr, <4 x i32> %x) #0 {
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define void @store_flat_trunc_i16(i16 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%y = trunc i32 %x to i16
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store i16 %y, i16 addrspace(4)* %fptr, align 2
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store volatile i16 %y, i16 addrspace(4)* %fptr, align 2
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ret void
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}
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@ -53,7 +53,7 @@ define void @store_flat_trunc_i16(i16 addrspace(1)* %gptr, i32 %x) #0 {
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define void @store_flat_trunc_i8(i8 addrspace(1)* %gptr, i32 %x) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%y = trunc i32 %x to i8
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store i8 %y, i8 addrspace(4)* %fptr, align 2
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store volatile i8 %y, i8 addrspace(4)* %fptr, align 2
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ret void
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}
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@ -63,7 +63,7 @@ define void @store_flat_trunc_i8(i8 addrspace(1)* %gptr, i32 %x) #0 {
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; CHECK: flat_load_dword
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define void @load_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i32 addrspace(1)* %gptr to i32 addrspace(4)*
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%fload = load i32, i32 addrspace(4)* %fptr, align 4
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%fload = load volatile i32, i32 addrspace(4)* %fptr, align 4
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store i32 %fload, i32 addrspace(1)* %out, align 4
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ret void
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}
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@ -72,7 +72,7 @@ define void @load_flat_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noa
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; CHECK: flat_load_dwordx2
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define void @load_flat_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i64 addrspace(1)* %gptr to i64 addrspace(4)*
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%fload = load i64, i64 addrspace(4)* %fptr, align 8
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%fload = load volatile i64, i64 addrspace(4)* %fptr, align 8
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store i64 %fload, i64 addrspace(1)* %out, align 8
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ret void
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}
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@ -81,7 +81,7 @@ define void @load_flat_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noa
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; CHECK: flat_load_dwordx4
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define void @load_flat_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast <4 x i32> addrspace(1)* %gptr to <4 x i32> addrspace(4)*
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%fload = load <4 x i32>, <4 x i32> addrspace(4)* %fptr, align 32
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%fload = load volatile <4 x i32>, <4 x i32> addrspace(4)* %fptr, align 32
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store <4 x i32> %fload, <4 x i32> addrspace(1)* %out, align 8
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ret void
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}
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@ -90,7 +90,7 @@ define void @load_flat_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> add
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; CHECK: flat_load_sbyte
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define void @sextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%fload = load i8, i8 addrspace(4)* %fptr, align 4
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%fload = load volatile i8, i8 addrspace(4)* %fptr, align 4
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%ext = sext i8 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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@ -100,7 +100,7 @@ define void @sextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* n
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; CHECK: flat_load_ubyte
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define void @zextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i8 addrspace(1)* %gptr to i8 addrspace(4)*
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%fload = load i8, i8 addrspace(4)* %fptr, align 4
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%fload = load volatile i8, i8 addrspace(4)* %fptr, align 4
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%ext = zext i8 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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@ -110,7 +110,7 @@ define void @zextload_flat_i8(i32 addrspace(1)* noalias %out, i8 addrspace(1)* n
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; CHECK: flat_load_sshort
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define void @sextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%fload = load i16, i16 addrspace(4)* %fptr, align 4
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%fload = load volatile i16, i16 addrspace(4)* %fptr, align 4
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%ext = sext i16 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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@ -120,7 +120,7 @@ define void @sextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)*
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; CHECK: flat_load_ushort
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define void @zextload_flat_i16(i32 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %gptr) #0 {
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%fptr = addrspacecast i16 addrspace(1)* %gptr to i16 addrspace(4)*
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%fload = load i16, i16 addrspace(4)* %fptr, align 4
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%fload = load volatile i16, i16 addrspace(4)* %fptr, align 4
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%ext = zext i16 %fload to i32
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store i32 %ext, i32 addrspace(1)* %out, align 4
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ret void
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