[Modules] Make Support/Debug.h modular. This requires it to not change

behavior based on other files defining DEBUG_TYPE, which means it cannot
define DEBUG_TYPE at all. This is actually better IMO as it forces folks
to define relevant DEBUG_TYPEs for their files. However, it requires all
files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't
already. I've updated all such files in LLVM and will do the same for
other upstream projects.

This still leaves one important change in how LLVM uses the DEBUG_TYPE
macro going forward: we need to only define the macro *after* header
files have been #include-ed. Previously, this wasn't possible because
Debug.h required the macro to be pre-defined. This commit removes that.
By defining DEBUG_TYPE after the includes two things are fixed:

- Header files that need to provide a DEBUG_TYPE for some inline code
  can do so by defining the macro before their inline code and undef-ing
  it afterward so the macro does not escape.

- We no longer have rampant ODR violations due to including headers with
  different DEBUG_TYPE definitions. This may be mostly an academic
  violation today, but with modules these types of violations are easy
  to check for and potentially very relevant.

Where necessary to suppor headers with DEBUG_TYPE, I have moved the
definitions below the includes in this commit. I plan to move the rest
of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big
enough.

The comments in Debug.h, which were hilariously out of date already,
have been updated to reflect the recommended practice going forward.

llvm-svn: 206822

include/llvm/Support/Debug.h

@@ -13,10 +13,12 @@
 //
 // In particular, just wrap your code with the DEBUG() macro, and it will be
 // enabled automatically if you specify '-debug' on the command-line.
-// Alternatively, you can also use the SET_DEBUG_TYPE("foo") macro to specify
-// that your debug code belongs to class "foo".  Then, on the command line, you
-// can specify '-debug-only=foo' to enable JUST the debug information for the
-// foo class.
+// Alternatively, you can also define the DEBUG_TYPE macro to "foo" specify
+// that your debug code belongs to class "foo". Be careful that you only do
+// this after including Debug.h and not around any #include of headers. Headers
+// should define and undef the macro acround the code that needs to use the
+// DEBUG() macro. Then, on the command line, you can specify '-debug-only=foo'
+// to enable JUST the debug information for the foo class.
 //
 // When compiling without assertions, the -debug-* options and all code in
 // DEBUG() statements disappears, so it does not affect the runtime of the code.
@@ -30,12 +32,6 @@
 
 namespace llvm {
 
-/// DEBUG_TYPE macro - Files can specify a DEBUG_TYPE as a string, which causes
-/// all of their DEBUG statements to be activatable with -debug-only=thatstring.
-#ifndef DEBUG_TYPE
-#define DEBUG_TYPE ""
-#endif
-
 #ifndef NDEBUG
 /// DebugFlag - This boolean is set to true if the '-debug' command line option
 /// is specified.  This should probably not be referenced directly, instead, use

include/llvm/Support/UnicodeCharRanges.h

@@ -21,6 +21,8 @@
 namespace llvm {
 namespace sys {
 
+#define DEBUG_TYPE "unicode"
+
 /// \brief Represents a closed range of Unicode code points [Lower, Upper].
 struct UnicodeCharRange {
   uint32_t Lower;
@@ -88,6 +90,8 @@ private:
   const CharRanges Ranges;
 };
 
+#undef DEBUG_TYPE // "unicode"
+
 } // namespace sys
 } // namespace llvm
 

include/llvm/Transforms/Utils/SSAUpdaterImpl.h

@@ -23,6 +23,8 @@
 
 namespace llvm {
 
+#define DEBUG_TYPE "ssaupdater"
+
 class CastInst;
 class PHINode;
 template<typename T> class SSAUpdaterTraits;
@@ -451,6 +453,8 @@ public:
   }
 };
 
+#undef DEBUG_TYPE // "ssaupdater"
+
 } // End llvm namespace
 
 #endif

lib/Analysis/LoopPass.cpp

@@ -19,6 +19,8 @@
 #include "llvm/Support/Timer.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "loop-pass-manager"
+
 namespace {
 
 /// PrintLoopPass - Print a Function corresponding to a Loop.

lib/CodeGen/MachineBasicBlock.cpp

@@ -35,6 +35,8 @@
 #include <algorithm>
 using namespace llvm;
 
+#define DEBUG_TYPE "codegen"
+
 MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
   : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
     AddressTaken(false), CachedMCSymbol(nullptr) {

lib/CodeGen/MachineFunction.cpp

@@ -38,6 +38,8 @@
 #include "llvm/Target/TargetMachine.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "codegen"
+
 //===----------------------------------------------------------------------===//
 // MachineFunction implementation
 //===----------------------------------------------------------------------===//

lib/CodeGen/MachineSSAUpdater.cpp

@@ -29,6 +29,8 @@
 #include "llvm/Transforms/Utils/SSAUpdaterImpl.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "machine-ssaupdater"
+
 typedef DenseMap<MachineBasicBlock*, unsigned> AvailableValsTy;
 static AvailableValsTy &getAvailableVals(void *AV) {
   return *static_cast<AvailableValsTy*>(AV);

lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp

@@ -27,6 +27,8 @@
 #include "llvm/Target/TargetRegisterInfo.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "dag-printer"
+
 namespace llvm {
   template<>
   struct DOTGraphTraits<SelectionDAG*> : public DefaultDOTGraphTraits {

lib/DebugInfo/DWARFContext.cpp

@@ -20,6 +20,8 @@ using namespace llvm;
 using namespace dwarf;
 using namespace object;
 
+#define DEBUG_TYPE "dwarf"
+
 typedef DWARFDebugLine::LineTable DWARFLineTable;
 
 static void dumpPubSection(raw_ostream &OS, StringRef Name, StringRef Data,

lib/IR/ConstantsContext.h

@@ -25,6 +25,8 @@
 #include "llvm/Support/raw_ostream.h"
 #include <map>
 
+#define DEBUG_TYPE "ir"
+
 namespace llvm {
 template<class ValType>
 struct ConstantTraits;

lib/IR/Core.cpp

@@ -41,6 +41,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "ir"
+
 void llvm::initializeCore(PassRegistry &Registry) {
   initializeDominatorTreeWrapperPassPass(Registry);
   initializePrintModulePassWrapperPass(Registry);

lib/IR/Pass.cpp

@@ -22,6 +22,8 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "ir"
+
 //===----------------------------------------------------------------------===//
 // Pass Implementation
 //

lib/MC/MCObjectDisassembler.cpp

@@ -31,6 +31,8 @@
 using namespace llvm;
 using namespace object;
 
+#define DEBUG_TYPE "mc"
+
 MCObjectDisassembler::MCObjectDisassembler(const ObjectFile &Obj,
                                            const MCDisassembler &Dis,
                                            const MCInstrAnalysis &MIA)

lib/MC/MachObjectWriter.cpp

@@ -26,6 +26,8 @@
 #include <vector>
 using namespace llvm;
 
+#define DEBUG_TYPE "mc"
+
 void MachObjectWriter::reset() {
   Relocations.clear();
   IndirectSymBase.clear();

lib/Support/CommandLine.cpp

@@ -38,6 +38,8 @@
 using namespace llvm;
 using namespace cl;
 
+#define DEBUG_TYPE "commandline"
+
 //===----------------------------------------------------------------------===//
 // Template instantiations and anchors.
 //

lib/Support/DAGDeltaAlgorithm.cpp

@@ -42,6 +42,8 @@
 #include <map>
 using namespace llvm;
 
+#define DEBUG_TYPE "dag-delta"
+
 namespace {
 
 class DAGDeltaAlgorithmImpl {

lib/Target/AArch64/AArch64Subtarget.cpp

@@ -19,6 +19,8 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
 
+#define DEBUG_TYPE "aarch64-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "AArch64GenSubtargetInfo.inc"

lib/Target/ARM/ARMBaseInstrInfo.cpp

@@ -42,6 +42,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "arm-instrinfo"
+
 static cl::opt<bool>
 EnableARM3Addr("enable-arm-3-addr-conv", cl::Hidden,
                cl::desc("Enable ARM 2-addr to 3-addr conv"));

lib/Target/ARM/ARMSubtarget.cpp

@@ -21,6 +21,8 @@
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetOptions.h"
 
+#define DEBUG_TYPE "arm-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "ARMGenSubtargetInfo.inc"

lib/Target/ARM64/ARM64Subtarget.cpp

@@ -18,6 +18,8 @@
 #include "llvm/IR/GlobalValue.h"
 #include "llvm/Support/TargetRegistry.h"
 
+#define DEBUG_TYPE "arm64-subtarget"
+
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_TARGET_DESC
 #include "ARM64GenSubtargetInfo.inc"

lib/Target/Hexagon/HexagonISelLowering.cpp

@@ -39,6 +39,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "hexagon-lowering"
+
 static cl::opt<bool>
 EmitJumpTables("hexagon-emit-jump-tables", cl::init(true), cl::Hidden,
                cl::desc("Control jump table emission on Hexagon target"));

lib/Target/Hexagon/HexagonInstrInfo.cpp

@@ -33,6 +33,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "hexagon-instrinfo"
+
 ///
 /// Constants for Hexagon instructions.
 ///

lib/Target/Hexagon/HexagonSubtarget.cpp

@@ -18,6 +18,8 @@
 #include "llvm/Support/ErrorHandling.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "hexagon-subtarget"
+
 #define GET_SUBTARGETINFO_CTOR
 #define GET_SUBTARGETINFO_TARGET_DESC
 #include "HexagonGenSubtargetInfo.inc"

lib/Target/MSP430/MSP430ISelDAGToDAG.cpp

@@ -31,6 +31,8 @@
 #include "llvm/Target/TargetLowering.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "msp430-isel"
+
 namespace {
   struct MSP430ISelAddressMode {
     enum {

lib/Target/MSP430/MSP430Subtarget.cpp

@@ -15,6 +15,8 @@
 #include "MSP430.h"
 #include "llvm/Support/TargetRegistry.h"
 
+#define DEBUG_TYPE "msp430-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "MSP430GenSubtargetInfo.inc"

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

@@ -29,6 +29,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "mips-asm-parser"
+
 namespace llvm {
 class MCInstrInfo;
 }

lib/Target/Mips/Disassembler/MipsDisassembler.cpp

@@ -25,6 +25,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "mips-disassembler"
+
 typedef MCDisassembler::DecodeStatus DecodeStatus;
 
 namespace {

lib/Target/Mips/Mips16InstrInfo.cpp

@@ -29,6 +29,7 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "mips16-instrinfo"
 
 Mips16InstrInfo::Mips16InstrInfo(MipsTargetMachine &tm)
   : MipsInstrInfo(tm, Mips::Bimm16),

lib/Target/Mips/Mips16RegisterInfo.cpp

@@ -39,6 +39,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "mips16-registerinfo"
+
 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST)
   : MipsRegisterInfo(ST) {}
 

lib/Target/Mips/MipsModuleISelDAGToDAG.cpp

@@ -14,6 +14,8 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/raw_ostream.h"
 
+#define DEBUG_TYPE "mips-isel"
+
 namespace llvm {
 
 bool MipsModuleDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {

lib/Target/Mips/MipsSERegisterInfo.cpp

@@ -39,6 +39,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "mips-reg-info"
+
 MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST)
   : MipsRegisterInfo(ST) {}
 

lib/Target/Mips/MipsTargetMachine.cpp

@@ -35,6 +35,8 @@
 #include "llvm/Transforms/Scalar.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "mips"
+
 
 
 extern "C" void LLVMInitializeMipsTarget() {

lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp

@@ -25,6 +25,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "nvptx-prolog-epilog"
+
 namespace {
 class NVPTXPrologEpilogPass : public MachineFunctionPass {
 public:

lib/Target/NVPTX/NVPTXSubtarget.cpp

@@ -12,6 +12,9 @@
 //===----------------------------------------------------------------------===//
 
 #include "NVPTXSubtarget.h"
+
+#define DEBUG_TYPE "nvptx-subtarget"
+
 #define GET_SUBTARGETINFO_ENUM
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
@@ -19,7 +22,6 @@
 
 using namespace llvm;
 
-
 // Pin the vtable to this file.
 void NVPTXSubtarget::anchor() {}
 

lib/Target/NVPTX/NVVMReflect.cpp

@@ -38,6 +38,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "nvptx-reflect"
+
 namespace llvm { void initializeNVVMReflectPass(PassRegistry &); }
 
 namespace {

lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp

@@ -17,6 +17,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "ppc-disassembler"
+
 typedef MCDisassembler::DecodeStatus DecodeStatus;
 
 namespace {

lib/Target/PowerPC/PPCInstrInfo.cpp

@@ -41,6 +41,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "ppc-instr-info"
+
 static cl::
 opt<bool> DisableCTRLoopAnal("disable-ppc-ctrloop-analysis", cl::Hidden,
             cl::desc("Disable analysis for CTR loops"));

lib/Target/PowerPC/PPCSubtarget.cpp

@@ -24,6 +24,8 @@
 #include "llvm/Target/TargetMachine.h"
 #include <cstdlib>
 
+#define DEBUG_TYPE "ppc-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "PPCGenSubtargetInfo.inc"

lib/Target/R600/AMDGPUSubtarget.cpp

@@ -16,6 +16,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "amdgpu-subtarget"
+
 #define GET_SUBTARGETINFO_ENUM
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR

lib/Target/Sparc/SparcSubtarget.cpp

@@ -16,6 +16,8 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/TargetRegistry.h"
 
+#define DEBUG_TYPE "sparc-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "SparcGenSubtargetInfo.inc"

lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp

@@ -17,6 +17,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "systemz-disassembler"
+
 typedef MCDisassembler::DecodeStatus DecodeStatus;
 
 namespace {

lib/Target/SystemZ/SystemZISelDAGToDAG.cpp

@@ -19,6 +19,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "systemz-isel"
+
 namespace {
 // Used to build addressing modes.
 struct SystemZAddressingMode {

lib/Target/SystemZ/SystemZSubtarget.cpp

@@ -12,6 +12,8 @@
 #include "llvm/IR/GlobalValue.h"
 #include "llvm/Support/Host.h"
 
+#define DEBUG_TYPE "systemz-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "SystemZGenSubtargetInfo.inc"

lib/Target/X86/Disassembler/X86Disassembler.cpp

@@ -37,6 +37,8 @@
 using namespace llvm;
 using namespace llvm::X86Disassembler;
 
+#define DEBUG_TYPE "x86-disassembler"
+
 void llvm::X86Disassembler::Debug(const char *file, unsigned line,
                                   const char *s) {
   dbgs() << file << ":" << line << ": " << s;

lib/Target/X86/X86InstrInfo.cpp

@@ -36,6 +36,8 @@
 #include "llvm/Target/TargetOptions.h"
 #include <limits>
 
+#define DEBUG_TYPE "x86-instr-info"
+
 #define GET_INSTRINFO_CTOR_DTOR
 #include "X86GenInstrInfo.inc"
 

lib/Target/XCore/Disassembler/XCoreDisassembler.cpp

@@ -24,6 +24,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "xcore-disassembler"
+
 typedef MCDisassembler::DecodeStatus DecodeStatus;
 
 namespace {

lib/Target/XCore/XCoreRegisterInfo.cpp

@@ -38,6 +38,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "xcore-reg-info"
+
 XCoreRegisterInfo::XCoreRegisterInfo()
   : XCoreGenRegisterInfo(XCore::LR) {
 }

lib/Target/XCore/XCoreSubtarget.cpp

@@ -15,6 +15,8 @@
 #include "XCore.h"
 #include "llvm/Support/TargetRegistry.h"
 
+#define DEBUG_TYPE "xcore-subtarget"
+
 #define GET_SUBTARGETINFO_TARGET_DESC
 #define GET_SUBTARGETINFO_CTOR
 #include "XCoreGenSubtargetInfo.inc"

lib/Transforms/Utils/CodeExtractor.cpp

@@ -38,6 +38,8 @@
 #include <set>
 using namespace llvm;
 
+#define DEBUG_TYPE "code-extractor"
+
 // Provide a command-line option to aggregate function arguments into a struct
 // for functions produced by the code extractor. This is useful when converting
 // extracted functions to pthread-based code, as only one argument (void*) can

lib/Transforms/Utils/Local.cpp

@@ -43,6 +43,8 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "local"
+
 STATISTIC(NumRemoved, "Number of unreachable basic blocks removed");
 
 //===----------------------------------------------------------------------===//

lib/Transforms/Utils/LowerSwitch.cpp

@@ -27,6 +27,8 @@
 #include <algorithm>
 using namespace llvm;
 
+#define DEBUG_TYPE "lower-switch"
+
 namespace {
   /// LowerSwitch Pass - Replace all SwitchInst instructions with chained branch
   /// instructions.

lib/Transforms/Utils/SSAUpdater.cpp

@@ -11,7 +11,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#define DEBUG_TYPE "ssaupdater"
 #include "llvm/Transforms/Utils/SSAUpdater.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/TinyPtrVector.h"
@@ -28,6 +27,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "ssaupdater"
+
 typedef DenseMap<BasicBlock*, Value*> AvailableValsTy;
 static AvailableValsTy &getAvailableVals(void *AV) {
   return *static_cast<AvailableValsTy*>(AV);

tools/bugpoint/ExtractFunction.cpp

@@ -34,6 +34,8 @@
 #include <set>
 using namespace llvm;
 
+#define DEBUG_TYPE "bugpoint"
+
 namespace llvm {
   bool DisableSimplifyCFG = false;
   extern cl::opt<std::string> OutputPrefix;

tools/bugpoint/OptimizerDriver.cpp

@@ -36,6 +36,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "bugpoint"
+
 namespace llvm {
   extern cl::opt<std::string> OutputPrefix;
 }

tools/lli/RemoteTargetExternal.cpp

@@ -26,6 +26,8 @@
 
 using namespace llvm;
 
+#define DEBUG_TYPE "lli"
+
 bool RemoteTargetExternal::allocateSpace(size_t Size, unsigned Alignment,
                                  uint64_t &Address) {
   DEBUG(dbgs() << "Message [allocate space] size: " << Size <<

utils/TableGen/AsmMatcherEmitter.cpp

@@ -117,6 +117,8 @@
 #include <sstream>
 using namespace llvm;
 
+#define DEBUG_TYPE "asm-matcher-emitter"
+
 static cl::opt<std::string>
 MatchPrefix("match-prefix", cl::init(""),
             cl::desc("Only match instructions with the given prefix"));

utils/TableGen/AsmWriterEmitter.cpp

@@ -29,6 +29,8 @@
 #include <vector>
 using namespace llvm;
 
+#define DEBUG_TYPE "asm-writer-emitter"
+
 namespace {
 class AsmWriterEmitter {
   RecordKeeper &Records;

utils/TableGen/CodeGenDAGPatterns.cpp

@@ -25,6 +25,8 @@
 #include <set>
 using namespace llvm;
 
+#define DEBUG_TYPE "dag-patterns"
+
 //===----------------------------------------------------------------------===//
 //  EEVT::TypeSet Implementation
 //===----------------------------------------------------------------------===//

utils/TableGen/DAGISelEmitter.cpp

@@ -18,6 +18,8 @@
 #include "llvm/TableGen/TableGenBackend.h"
 using namespace llvm;
 
+#define DEBUG_TYPE "dag-isel-emitter"
+
 namespace {
 /// DAGISelEmitter - The top-level class which coordinates construction
 /// and emission of the instruction selector.