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CodeGen: Do not require a MachineFunction just to create a DIEDwarfExpression.

We are about to start using DIEDwarfExpression to create global variable
DIEs, which happens before we generate code for functions.

Differential Revision: http://reviews.llvm.org/D20412

llvm-svn: 270257
This commit is contained in:
Peter Collingbourne 2016-05-20 19:35:17 +00:00
parent ff22caedd8
commit 162aaa4e2a
6 changed files with 49 additions and 41 deletions

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@ -178,8 +178,7 @@ void AsmPrinter::emitDwarfStringOffset(DwarfStringPoolEntryRef S) const {
/// EmitDwarfRegOp - Emit dwarf register operation. /// EmitDwarfRegOp - Emit dwarf register operation.
void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer, void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
const MachineLocation &MLoc) const { const MachineLocation &MLoc) const {
DebugLocDwarfExpression Expr(*MF->getSubtarget().getRegisterInfo(), DebugLocDwarfExpression Expr(getDwarfDebug()->getDwarfVersion(), Streamer);
getDwarfDebug()->getDwarfVersion(), Streamer);
const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo(); const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo();
int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false); int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) { if (Reg < 0) {
@ -193,7 +192,8 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
"nop (could not find a dwarf register number)"); "nop (could not find a dwarf register number)");
// Attempt to find a valid super- or sub-register. // Attempt to find a valid super- or sub-register.
if (!Expr.AddMachineRegPiece(MLoc.getReg())) if (!Expr.AddMachineRegPiece(*MF->getSubtarget().getRegisterInfo(),
MLoc.getReg()))
Expr.EmitOp(dwarf::DW_OP_nop, Expr.EmitOp(dwarf::DW_OP_nop,
"nop (could not find a dwarf register number)"); "nop (could not find a dwarf register number)");
return; return;

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@ -539,7 +539,8 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV,
const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering(); const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg); int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
assert(Expr != DV.getExpression().end() && "Wrong number of expressions"); assert(Expr != DV.getExpression().end() && "Wrong number of expressions");
DwarfExpr.AddMachineRegIndirect(FrameReg, Offset); DwarfExpr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
FrameReg, Offset);
DwarfExpr.AddExpression((*Expr)->expr_op_begin(), (*Expr)->expr_op_end()); DwarfExpr.AddExpression((*Expr)->expr_op_begin(), (*Expr)->expr_op_end());
++Expr; ++Expr;
} }
@ -766,13 +767,14 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc); DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
const DIExpression *Expr = DV.getSingleExpression(); const DIExpression *Expr = DV.getSingleExpression();
bool ValidReg; bool ValidReg;
const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
if (Location.getOffset()) { if (Location.getOffset()) {
ValidReg = DwarfExpr.AddMachineRegIndirect(Location.getReg(), ValidReg = DwarfExpr.AddMachineRegIndirect(TRI, Location.getReg(),
Location.getOffset()); Location.getOffset());
if (ValidReg) if (ValidReg)
DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end()); DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end());
} else } else
ValidReg = DwarfExpr.AddMachineRegExpression(Expr, Location.getReg()); ValidReg = DwarfExpr.AddMachineRegExpression(TRI, Expr, Location.getReg());
// Now attach the location information to the DIE. // Now attach the location information to the DIE.
if (ValidReg) if (ValidReg)

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@ -138,7 +138,8 @@ void DebugLocDwarfExpression::EmitUnsigned(uint64_t Value) {
BS.EmitULEB128(Value, Twine(Value)); BS.EmitULEB128(Value, Twine(Value));
} }
bool DebugLocDwarfExpression::isFrameRegister(unsigned MachineReg) { bool DebugLocDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
unsigned MachineReg) {
// This information is not available while emitting .debug_loc entries. // This information is not available while emitting .debug_loc entries.
return false; return false;
} }
@ -1400,8 +1401,7 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
ByteStreamer &Streamer, ByteStreamer &Streamer,
const DebugLocEntry::Value &Value, const DebugLocEntry::Value &Value,
unsigned PieceOffsetInBits) { unsigned PieceOffsetInBits) {
DebugLocDwarfExpression DwarfExpr(*AP.MF->getSubtarget().getRegisterInfo(), DebugLocDwarfExpression DwarfExpr(AP.getDwarfDebug()->getDwarfVersion(),
AP.getDwarfDebug()->getDwarfVersion(),
Streamer); Streamer);
// Regular entry. // Regular entry.
if (Value.isInt()) { if (Value.isInt()) {
@ -1418,12 +1418,13 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
AP.EmitDwarfRegOp(Streamer, Loc); AP.EmitDwarfRegOp(Streamer, Loc);
else { else {
// Complex address entry. // Complex address entry.
const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
if (Loc.getOffset()) { if (Loc.getOffset()) {
DwarfExpr.AddMachineRegIndirect(Loc.getReg(), Loc.getOffset()); DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset());
DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end(), DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end(),
PieceOffsetInBits); PieceOffsetInBits);
} else } else
DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(), DwarfExpr.AddMachineRegExpression(TRI, Expr, Loc.getReg(),
PieceOffsetInBits); PieceOffsetInBits);
} }
} else if (Value.isConstantFP()) { } else if (Value.isConstantFP()) {
@ -1454,8 +1455,7 @@ void DebugLocEntry::finalize(const AsmPrinter &AP,
assert(Offset <= PieceOffset && "overlapping or duplicate pieces"); assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
if (Offset < PieceOffset) { if (Offset < PieceOffset) {
// The DWARF spec seriously mandates pieces with no locations for gaps. // The DWARF spec seriously mandates pieces with no locations for gaps.
DebugLocDwarfExpression Expr(*AP.MF->getSubtarget().getRegisterInfo(), DebugLocDwarfExpression Expr(AP.getDwarfDebug()->getDwarfVersion(),
AP.getDwarfDebug()->getDwarfVersion(),
Streamer); Streamer);
Expr.AddOpPiece(PieceOffset-Offset, 0); Expr.AddOpPiece(PieceOffset-Offset, 0);
Offset += PieceOffset-Offset; Offset += PieceOffset-Offset;

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@ -65,8 +65,9 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
EmitOp(dwarf::DW_OP_shr); EmitOp(dwarf::DW_OP_shr);
} }
bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) { bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI,
if (isFrameRegister(MachineReg)) { unsigned MachineReg, int Offset) {
if (isFrameRegister(TRI, MachineReg)) {
// If variable offset is based in frame register then use fbreg. // If variable offset is based in frame register then use fbreg.
EmitOp(dwarf::DW_OP_fbreg); EmitOp(dwarf::DW_OP_fbreg);
EmitSigned(Offset); EmitSigned(Offset);
@ -81,7 +82,8 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
return true; return true;
} }
bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg, bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI,
unsigned MachineReg,
unsigned PieceSizeInBits, unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) { unsigned PieceOffsetInBits) {
if (!TRI.isPhysicalRegister(MachineReg)) if (!TRI.isPhysicalRegister(MachineReg))
@ -200,13 +202,14 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
return OffsetInBits; return OffsetInBits;
} }
bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr, bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI,
const DIExpression *Expr,
unsigned MachineReg, unsigned MachineReg,
unsigned PieceOffsetInBits) { unsigned PieceOffsetInBits) {
auto I = Expr->expr_op_begin(); auto I = Expr->expr_op_begin();
auto E = Expr->expr_op_end(); auto E = Expr->expr_op_end();
if (I == E) if (I == E)
return AddMachineRegPiece(MachineReg); return AddMachineRegPiece(TRI, MachineReg);
// Pattern-match combinations for which more efficient representations exist // Pattern-match combinations for which more efficient representations exist
// first. // first.
@ -216,7 +219,7 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
unsigned OffsetInBits = I->getArg(0); unsigned OffsetInBits = I->getArg(0);
unsigned SizeInBits = I->getArg(1); unsigned SizeInBits = I->getArg(1);
// Piece always comes at the end of the expression. // Piece always comes at the end of the expression.
return AddMachineRegPiece(MachineReg, SizeInBits, return AddMachineRegPiece(TRI, MachineReg, SizeInBits,
getOffsetOrZero(OffsetInBits, PieceOffsetInBits)); getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
} }
case dwarf::DW_OP_plus: case dwarf::DW_OP_plus:
@ -227,15 +230,15 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
if (N != E && N->getOp() == dwarf::DW_OP_deref) { if (N != E && N->getOp() == dwarf::DW_OP_deref) {
unsigned Offset = I->getArg(0); unsigned Offset = I->getArg(0);
ValidReg = AddMachineRegIndirect( ValidReg = AddMachineRegIndirect(
MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset); TRI, MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
std::advance(I, 2); std::advance(I, 2);
break; break;
} else } else
ValidReg = AddMachineRegPiece(MachineReg); ValidReg = AddMachineRegPiece(TRI, MachineReg);
} }
case dwarf::DW_OP_deref: { case dwarf::DW_OP_deref: {
// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg]. // [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
ValidReg = AddMachineRegIndirect(MachineReg); ValidReg = AddMachineRegIndirect(TRI, MachineReg);
++I; ++I;
break; break;
} }

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@ -31,13 +31,10 @@ class DIELoc;
class DwarfExpression { class DwarfExpression {
protected: protected:
// Various convenience accessors that extract things out of AsmPrinter. // Various convenience accessors that extract things out of AsmPrinter.
const TargetRegisterInfo &TRI;
unsigned DwarfVersion; unsigned DwarfVersion;
public: public:
DwarfExpression(const TargetRegisterInfo &TRI, DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
unsigned DwarfVersion)
: TRI(TRI), DwarfVersion(DwarfVersion) {}
virtual ~DwarfExpression() {} virtual ~DwarfExpression() {}
/// Output a dwarf operand and an optional assembler comment. /// Output a dwarf operand and an optional assembler comment.
@ -48,7 +45,7 @@ public:
virtual void EmitUnsigned(uint64_t Value) = 0; virtual void EmitUnsigned(uint64_t Value) = 0;
/// Return whether the given machine register is the frame register in the /// Return whether the given machine register is the frame register in the
/// current function. /// current function.
virtual bool isFrameRegister(unsigned MachineReg) = 0; virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
/// Emit a dwarf register operation. /// Emit a dwarf register operation.
void AddReg(int DwarfReg, const char *Comment = nullptr); void AddReg(int DwarfReg, const char *Comment = nullptr);
@ -77,7 +74,8 @@ public:
/// Emit an indirect dwarf register operation for the given machine register. /// Emit an indirect dwarf register operation for the given machine register.
/// \return false if no DWARF register exists for MachineReg. /// \return false if no DWARF register exists for MachineReg.
bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0); bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg,
int Offset = 0);
/// \brief Emit a partial DWARF register operation. /// \brief Emit a partial DWARF register operation.
/// \param MachineReg the register /// \param MachineReg the register
@ -93,7 +91,8 @@ public:
/// subregisters that alias the register. /// subregisters that alias the register.
/// ///
/// \return false if no DWARF register exists for MachineReg. /// \return false if no DWARF register exists for MachineReg.
bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0, bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg,
unsigned PieceSizeInBits = 0,
unsigned PieceOffsetInBits = 0); unsigned PieceOffsetInBits = 0);
/// Emit a signed constant. /// Emit a signed constant.
@ -108,7 +107,8 @@ public:
/// \param PieceOffsetInBits If this is one piece out of a fragmented /// \param PieceOffsetInBits If this is one piece out of a fragmented
/// location, this is the offset of the piece inside the entire variable. /// location, this is the offset of the piece inside the entire variable.
/// \return false if no DWARF register exists for MachineReg. /// \return false if no DWARF register exists for MachineReg.
bool AddMachineRegExpression(const DIExpression *Expr, unsigned MachineReg, bool AddMachineRegExpression(const TargetRegisterInfo &TRI,
const DIExpression *Expr, unsigned MachineReg,
unsigned PieceOffsetInBits = 0); unsigned PieceOffsetInBits = 0);
/// Emit a the operations remaining the DIExpressionIterator I. /// Emit a the operations remaining the DIExpressionIterator I.
/// \param PieceOffsetInBits If this is one piece out of a fragmented /// \param PieceOffsetInBits If this is one piece out of a fragmented
@ -123,14 +123,14 @@ class DebugLocDwarfExpression : public DwarfExpression {
ByteStreamer &BS; ByteStreamer &BS;
public: public:
DebugLocDwarfExpression(const TargetRegisterInfo &TRI, DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
unsigned DwarfVersion, ByteStreamer &BS) : DwarfExpression(DwarfVersion), BS(BS) {}
: DwarfExpression(TRI, DwarfVersion), BS(BS) {}
void EmitOp(uint8_t Op, const char *Comment = nullptr) override; void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
void EmitSigned(int64_t Value) override; void EmitSigned(int64_t Value) override;
void EmitUnsigned(uint64_t Value) override; void EmitUnsigned(uint64_t Value) override;
bool isFrameRegister(unsigned MachineReg) override; bool isFrameRegister(const TargetRegisterInfo &TRI,
unsigned MachineReg) override;
}; };
/// DwarfExpression implementation for singular DW_AT_location. /// DwarfExpression implementation for singular DW_AT_location.
@ -144,7 +144,8 @@ public:
void EmitOp(uint8_t Op, const char *Comment = nullptr) override; void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
void EmitSigned(int64_t Value) override; void EmitSigned(int64_t Value) override;
void EmitUnsigned(uint64_t Value) override; void EmitUnsigned(uint64_t Value) override;
bool isFrameRegister(unsigned MachineReg) override; bool isFrameRegister(const TargetRegisterInfo &TRI,
unsigned MachineReg) override;
}; };
} }

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@ -46,9 +46,8 @@ GenerateDwarfTypeUnits("generate-type-units", cl::Hidden,
DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU,
DIELoc &DIE) DIELoc &DIE)
: DwarfExpression(*AP.MF->getSubtarget().getRegisterInfo(), : DwarfExpression(AP.getDwarfDebug()->getDwarfVersion()), AP(AP), DU(DU),
AP.getDwarfDebug()->getDwarfVersion()), DIE(DIE) {}
AP(AP), DU(DU), DIE(DIE) {}
void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) { void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
DU.addUInt(DIE, dwarf::DW_FORM_data1, Op); DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
@ -59,7 +58,8 @@ void DIEDwarfExpression::EmitSigned(int64_t Value) {
void DIEDwarfExpression::EmitUnsigned(uint64_t Value) { void DIEDwarfExpression::EmitUnsigned(uint64_t Value) {
DU.addUInt(DIE, dwarf::DW_FORM_udata, Value); DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
} }
bool DIEDwarfExpression::isFrameRegister(unsigned MachineReg) { bool DIEDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
unsigned MachineReg) {
return MachineReg == TRI.getFrameRegister(*AP.MF); return MachineReg == TRI.getFrameRegister(*AP.MF);
} }
@ -368,14 +368,16 @@ void DwarfUnit::addSourceLine(DIE &Die, const DINamespace *NS) {
bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg, bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
unsigned SizeInBits, unsigned OffsetInBits) { unsigned SizeInBits, unsigned OffsetInBits) {
DIEDwarfExpression Expr(*Asm, *this, TheDie); DIEDwarfExpression Expr(*Asm, *this, TheDie);
Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits); Expr.AddMachineRegPiece(*Asm->MF->getSubtarget().getRegisterInfo(), Reg,
SizeInBits, OffsetInBits);
return true; return true;
} }
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg, bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
int64_t Offset) { int64_t Offset) {
DIEDwarfExpression Expr(*Asm, *this, TheDie); DIEDwarfExpression Expr(*Asm, *this, TheDie);
return Expr.AddMachineRegIndirect(Reg, Offset); return Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
Reg, Offset);
} }
/* Byref variables, in Blocks, are declared by the programmer as "SomeType /* Byref variables, in Blocks, are declared by the programmer as "SomeType