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CodeGen: Do not require a MachineFunction just to create a DIEDwarfExpression.
We are about to start using DIEDwarfExpression to create global variable DIEs, which happens before we generate code for functions. Differential Revision: http://reviews.llvm.org/D20412 llvm-svn: 270257
This commit is contained in:
parent
ff22caedd8
commit
162aaa4e2a
@ -178,8 +178,7 @@ void AsmPrinter::emitDwarfStringOffset(DwarfStringPoolEntryRef S) const {
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/// EmitDwarfRegOp - Emit dwarf register operation.
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/// EmitDwarfRegOp - Emit dwarf register operation.
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void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
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void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
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const MachineLocation &MLoc) const {
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const MachineLocation &MLoc) const {
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DebugLocDwarfExpression Expr(*MF->getSubtarget().getRegisterInfo(),
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DebugLocDwarfExpression Expr(getDwarfDebug()->getDwarfVersion(), Streamer);
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getDwarfDebug()->getDwarfVersion(), Streamer);
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const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo();
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const MCRegisterInfo *MRI = MMI->getContext().getRegisterInfo();
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int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false);
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int Reg = MRI->getDwarfRegNum(MLoc.getReg(), false);
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if (Reg < 0) {
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if (Reg < 0) {
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@ -193,7 +192,8 @@ void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
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"nop (could not find a dwarf register number)");
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"nop (could not find a dwarf register number)");
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// Attempt to find a valid super- or sub-register.
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// Attempt to find a valid super- or sub-register.
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if (!Expr.AddMachineRegPiece(MLoc.getReg()))
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if (!Expr.AddMachineRegPiece(*MF->getSubtarget().getRegisterInfo(),
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MLoc.getReg()))
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Expr.EmitOp(dwarf::DW_OP_nop,
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Expr.EmitOp(dwarf::DW_OP_nop,
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"nop (could not find a dwarf register number)");
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"nop (could not find a dwarf register number)");
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return;
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return;
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@ -539,7 +539,8 @@ DIE *DwarfCompileUnit::constructVariableDIEImpl(const DbgVariable &DV,
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const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
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const TargetFrameLowering *TFI = Asm->MF->getSubtarget().getFrameLowering();
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int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
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int Offset = TFI->getFrameIndexReference(*Asm->MF, FI, FrameReg);
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assert(Expr != DV.getExpression().end() && "Wrong number of expressions");
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assert(Expr != DV.getExpression().end() && "Wrong number of expressions");
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DwarfExpr.AddMachineRegIndirect(FrameReg, Offset);
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DwarfExpr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
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FrameReg, Offset);
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DwarfExpr.AddExpression((*Expr)->expr_op_begin(), (*Expr)->expr_op_end());
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DwarfExpr.AddExpression((*Expr)->expr_op_begin(), (*Expr)->expr_op_end());
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++Expr;
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++Expr;
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}
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}
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@ -766,13 +767,14 @@ void DwarfCompileUnit::addComplexAddress(const DbgVariable &DV, DIE &Die,
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DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
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DIEDwarfExpression DwarfExpr(*Asm, *this, *Loc);
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const DIExpression *Expr = DV.getSingleExpression();
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const DIExpression *Expr = DV.getSingleExpression();
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bool ValidReg;
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bool ValidReg;
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const TargetRegisterInfo &TRI = *Asm->MF->getSubtarget().getRegisterInfo();
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if (Location.getOffset()) {
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if (Location.getOffset()) {
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ValidReg = DwarfExpr.AddMachineRegIndirect(Location.getReg(),
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ValidReg = DwarfExpr.AddMachineRegIndirect(TRI, Location.getReg(),
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Location.getOffset());
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Location.getOffset());
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if (ValidReg)
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if (ValidReg)
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DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end());
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DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end());
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} else
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} else
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ValidReg = DwarfExpr.AddMachineRegExpression(Expr, Location.getReg());
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ValidReg = DwarfExpr.AddMachineRegExpression(TRI, Expr, Location.getReg());
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// Now attach the location information to the DIE.
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// Now attach the location information to the DIE.
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if (ValidReg)
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if (ValidReg)
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@ -138,7 +138,8 @@ void DebugLocDwarfExpression::EmitUnsigned(uint64_t Value) {
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BS.EmitULEB128(Value, Twine(Value));
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BS.EmitULEB128(Value, Twine(Value));
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}
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}
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bool DebugLocDwarfExpression::isFrameRegister(unsigned MachineReg) {
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bool DebugLocDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) {
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// This information is not available while emitting .debug_loc entries.
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// This information is not available while emitting .debug_loc entries.
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return false;
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return false;
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}
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}
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@ -1400,8 +1401,7 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
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ByteStreamer &Streamer,
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ByteStreamer &Streamer,
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const DebugLocEntry::Value &Value,
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const DebugLocEntry::Value &Value,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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DebugLocDwarfExpression DwarfExpr(*AP.MF->getSubtarget().getRegisterInfo(),
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DebugLocDwarfExpression DwarfExpr(AP.getDwarfDebug()->getDwarfVersion(),
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AP.getDwarfDebug()->getDwarfVersion(),
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Streamer);
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Streamer);
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// Regular entry.
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// Regular entry.
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if (Value.isInt()) {
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if (Value.isInt()) {
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@ -1418,12 +1418,13 @@ static void emitDebugLocValue(const AsmPrinter &AP, const DIBasicType *BT,
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AP.EmitDwarfRegOp(Streamer, Loc);
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AP.EmitDwarfRegOp(Streamer, Loc);
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else {
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else {
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// Complex address entry.
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// Complex address entry.
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const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
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if (Loc.getOffset()) {
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if (Loc.getOffset()) {
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DwarfExpr.AddMachineRegIndirect(Loc.getReg(), Loc.getOffset());
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DwarfExpr.AddMachineRegIndirect(TRI, Loc.getReg(), Loc.getOffset());
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DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end(),
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DwarfExpr.AddExpression(Expr->expr_op_begin(), Expr->expr_op_end(),
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PieceOffsetInBits);
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PieceOffsetInBits);
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} else
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} else
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DwarfExpr.AddMachineRegExpression(Expr, Loc.getReg(),
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DwarfExpr.AddMachineRegExpression(TRI, Expr, Loc.getReg(),
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PieceOffsetInBits);
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PieceOffsetInBits);
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}
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}
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} else if (Value.isConstantFP()) {
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} else if (Value.isConstantFP()) {
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@ -1454,8 +1455,7 @@ void DebugLocEntry::finalize(const AsmPrinter &AP,
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assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
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assert(Offset <= PieceOffset && "overlapping or duplicate pieces");
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if (Offset < PieceOffset) {
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if (Offset < PieceOffset) {
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// The DWARF spec seriously mandates pieces with no locations for gaps.
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// The DWARF spec seriously mandates pieces with no locations for gaps.
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DebugLocDwarfExpression Expr(*AP.MF->getSubtarget().getRegisterInfo(),
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DebugLocDwarfExpression Expr(AP.getDwarfDebug()->getDwarfVersion(),
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AP.getDwarfDebug()->getDwarfVersion(),
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Streamer);
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Streamer);
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Expr.AddOpPiece(PieceOffset-Offset, 0);
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Expr.AddOpPiece(PieceOffset-Offset, 0);
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Offset += PieceOffset-Offset;
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Offset += PieceOffset-Offset;
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@ -65,8 +65,9 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
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EmitOp(dwarf::DW_OP_shr);
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EmitOp(dwarf::DW_OP_shr);
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}
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}
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bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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bool DwarfExpression::AddMachineRegIndirect(const TargetRegisterInfo &TRI,
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if (isFrameRegister(MachineReg)) {
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unsigned MachineReg, int Offset) {
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if (isFrameRegister(TRI, MachineReg)) {
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// If variable offset is based in frame register then use fbreg.
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// If variable offset is based in frame register then use fbreg.
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EmitOp(dwarf::DW_OP_fbreg);
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EmitOp(dwarf::DW_OP_fbreg);
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EmitSigned(Offset);
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EmitSigned(Offset);
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@ -81,7 +82,8 @@ bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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return true;
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return true;
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}
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}
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bool DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
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bool DwarfExpression::AddMachineRegPiece(const TargetRegisterInfo &TRI,
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unsigned MachineReg,
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unsigned PieceSizeInBits,
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unsigned PieceSizeInBits,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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if (!TRI.isPhysicalRegister(MachineReg))
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if (!TRI.isPhysicalRegister(MachineReg))
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@ -200,13 +202,14 @@ static unsigned getOffsetOrZero(unsigned OffsetInBits,
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return OffsetInBits;
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return OffsetInBits;
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}
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}
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bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
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bool DwarfExpression::AddMachineRegExpression(const TargetRegisterInfo &TRI,
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const DIExpression *Expr,
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unsigned MachineReg,
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unsigned MachineReg,
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unsigned PieceOffsetInBits) {
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unsigned PieceOffsetInBits) {
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auto I = Expr->expr_op_begin();
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auto I = Expr->expr_op_begin();
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auto E = Expr->expr_op_end();
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auto E = Expr->expr_op_end();
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if (I == E)
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if (I == E)
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return AddMachineRegPiece(MachineReg);
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return AddMachineRegPiece(TRI, MachineReg);
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// Pattern-match combinations for which more efficient representations exist
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// Pattern-match combinations for which more efficient representations exist
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// first.
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// first.
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@ -216,7 +219,7 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
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unsigned OffsetInBits = I->getArg(0);
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unsigned OffsetInBits = I->getArg(0);
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unsigned SizeInBits = I->getArg(1);
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unsigned SizeInBits = I->getArg(1);
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// Piece always comes at the end of the expression.
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// Piece always comes at the end of the expression.
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return AddMachineRegPiece(MachineReg, SizeInBits,
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return AddMachineRegPiece(TRI, MachineReg, SizeInBits,
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getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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getOffsetOrZero(OffsetInBits, PieceOffsetInBits));
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}
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}
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case dwarf::DW_OP_plus:
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case dwarf::DW_OP_plus:
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@ -227,15 +230,15 @@ bool DwarfExpression::AddMachineRegExpression(const DIExpression *Expr,
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if (N != E && N->getOp() == dwarf::DW_OP_deref) {
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if (N != E && N->getOp() == dwarf::DW_OP_deref) {
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unsigned Offset = I->getArg(0);
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unsigned Offset = I->getArg(0);
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ValidReg = AddMachineRegIndirect(
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ValidReg = AddMachineRegIndirect(
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MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
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TRI, MachineReg, I->getOp() == dwarf::DW_OP_plus ? Offset : -Offset);
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std::advance(I, 2);
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std::advance(I, 2);
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break;
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break;
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} else
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} else
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ValidReg = AddMachineRegPiece(MachineReg);
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ValidReg = AddMachineRegPiece(TRI, MachineReg);
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}
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}
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case dwarf::DW_OP_deref: {
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case dwarf::DW_OP_deref: {
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// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
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// [DW_OP_reg,DW_OP_deref] --> [DW_OP_breg].
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ValidReg = AddMachineRegIndirect(MachineReg);
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ValidReg = AddMachineRegIndirect(TRI, MachineReg);
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++I;
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++I;
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break;
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break;
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}
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}
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@ -31,13 +31,10 @@ class DIELoc;
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class DwarfExpression {
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class DwarfExpression {
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protected:
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protected:
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// Various convenience accessors that extract things out of AsmPrinter.
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// Various convenience accessors that extract things out of AsmPrinter.
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const TargetRegisterInfo &TRI;
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unsigned DwarfVersion;
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unsigned DwarfVersion;
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public:
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public:
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DwarfExpression(const TargetRegisterInfo &TRI,
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DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
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unsigned DwarfVersion)
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: TRI(TRI), DwarfVersion(DwarfVersion) {}
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virtual ~DwarfExpression() {}
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virtual ~DwarfExpression() {}
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/// Output a dwarf operand and an optional assembler comment.
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/// Output a dwarf operand and an optional assembler comment.
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@ -48,7 +45,7 @@ public:
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virtual void EmitUnsigned(uint64_t Value) = 0;
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virtual void EmitUnsigned(uint64_t Value) = 0;
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/// Return whether the given machine register is the frame register in the
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/// Return whether the given machine register is the frame register in the
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/// current function.
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/// current function.
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virtual bool isFrameRegister(unsigned MachineReg) = 0;
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virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
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/// Emit a dwarf register operation.
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/// Emit a dwarf register operation.
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void AddReg(int DwarfReg, const char *Comment = nullptr);
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void AddReg(int DwarfReg, const char *Comment = nullptr);
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@ -77,7 +74,8 @@ public:
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/// Emit an indirect dwarf register operation for the given machine register.
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/// Emit an indirect dwarf register operation for the given machine register.
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/// \return false if no DWARF register exists for MachineReg.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0);
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bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg,
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int Offset = 0);
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/// \brief Emit a partial DWARF register operation.
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/// \brief Emit a partial DWARF register operation.
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/// \param MachineReg the register
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/// \param MachineReg the register
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@ -93,7 +91,8 @@ public:
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/// subregisters that alias the register.
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/// subregisters that alias the register.
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///
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///
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/// \return false if no DWARF register exists for MachineReg.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
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bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg,
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unsigned PieceSizeInBits = 0,
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unsigned PieceOffsetInBits = 0);
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unsigned PieceOffsetInBits = 0);
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/// Emit a signed constant.
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/// Emit a signed constant.
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@ -108,7 +107,8 @@ public:
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// location, this is the offset of the piece inside the entire variable.
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/// location, this is the offset of the piece inside the entire variable.
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/// \return false if no DWARF register exists for MachineReg.
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/// \return false if no DWARF register exists for MachineReg.
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bool AddMachineRegExpression(const DIExpression *Expr, unsigned MachineReg,
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bool AddMachineRegExpression(const TargetRegisterInfo &TRI,
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const DIExpression *Expr, unsigned MachineReg,
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unsigned PieceOffsetInBits = 0);
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unsigned PieceOffsetInBits = 0);
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/// Emit a the operations remaining the DIExpressionIterator I.
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/// Emit a the operations remaining the DIExpressionIterator I.
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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/// \param PieceOffsetInBits If this is one piece out of a fragmented
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@ -123,14 +123,14 @@ class DebugLocDwarfExpression : public DwarfExpression {
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ByteStreamer &BS;
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ByteStreamer &BS;
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public:
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public:
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DebugLocDwarfExpression(const TargetRegisterInfo &TRI,
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DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
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unsigned DwarfVersion, ByteStreamer &BS)
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: DwarfExpression(DwarfVersion), BS(BS) {}
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: DwarfExpression(TRI, DwarfVersion), BS(BS) {}
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitSigned(int64_t Value) override;
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void EmitSigned(int64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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bool isFrameRegister(unsigned MachineReg) override;
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bool isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) override;
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};
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};
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/// DwarfExpression implementation for singular DW_AT_location.
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/// DwarfExpression implementation for singular DW_AT_location.
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@ -144,7 +144,8 @@ public:
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
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void EmitSigned(int64_t Value) override;
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void EmitSigned(int64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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void EmitUnsigned(uint64_t Value) override;
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bool isFrameRegister(unsigned MachineReg) override;
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bool isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) override;
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};
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};
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}
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}
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@ -46,9 +46,8 @@ GenerateDwarfTypeUnits("generate-type-units", cl::Hidden,
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DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU,
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DIEDwarfExpression::DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU,
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DIELoc &DIE)
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DIELoc &DIE)
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: DwarfExpression(*AP.MF->getSubtarget().getRegisterInfo(),
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: DwarfExpression(AP.getDwarfDebug()->getDwarfVersion()), AP(AP), DU(DU),
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AP.getDwarfDebug()->getDwarfVersion()),
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DIE(DIE) {}
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AP(AP), DU(DU), DIE(DIE) {}
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void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
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void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
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DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
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DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
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@ -59,7 +58,8 @@ void DIEDwarfExpression::EmitSigned(int64_t Value) {
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void DIEDwarfExpression::EmitUnsigned(uint64_t Value) {
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void DIEDwarfExpression::EmitUnsigned(uint64_t Value) {
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DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
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DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
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}
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}
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bool DIEDwarfExpression::isFrameRegister(unsigned MachineReg) {
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bool DIEDwarfExpression::isFrameRegister(const TargetRegisterInfo &TRI,
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unsigned MachineReg) {
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return MachineReg == TRI.getFrameRegister(*AP.MF);
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return MachineReg == TRI.getFrameRegister(*AP.MF);
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}
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}
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@ -368,14 +368,16 @@ void DwarfUnit::addSourceLine(DIE &Die, const DINamespace *NS) {
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bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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unsigned SizeInBits, unsigned OffsetInBits) {
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unsigned SizeInBits, unsigned OffsetInBits) {
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DIEDwarfExpression Expr(*Asm, *this, TheDie);
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DIEDwarfExpression Expr(*Asm, *this, TheDie);
|
||||||
Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
|
Expr.AddMachineRegPiece(*Asm->MF->getSubtarget().getRegisterInfo(), Reg,
|
||||||
|
SizeInBits, OffsetInBits);
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
|
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
|
||||||
int64_t Offset) {
|
int64_t Offset) {
|
||||||
DIEDwarfExpression Expr(*Asm, *this, TheDie);
|
DIEDwarfExpression Expr(*Asm, *this, TheDie);
|
||||||
return Expr.AddMachineRegIndirect(Reg, Offset);
|
return Expr.AddMachineRegIndirect(*Asm->MF->getSubtarget().getRegisterInfo(),
|
||||||
|
Reg, Offset);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Byref variables, in Blocks, are declared by the programmer as "SomeType
|
/* Byref variables, in Blocks, are declared by the programmer as "SomeType
|
||||||
|
Loading…
Reference in New Issue
Block a user