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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 03:53:04 +02:00

Remove the old and unused PPC32 and PPC64TargetMachine classes.

llvm-svn: 305628
This commit is contained in:
Eric Christopher 2017-06-17 02:25:53 +00:00
parent 9f6b7ed018
commit 16d1a522c8
2 changed files with 4 additions and 47 deletions

View File

@ -86,9 +86,9 @@ EnableMachineCombinerPass("ppc-machine-combiner",
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
RegisterTargetMachine<PPC32TargetMachine> A(getThePPC32Target());
RegisterTargetMachine<PPC64TargetMachine> B(getThePPC64Target());
RegisterTargetMachine<PPC64TargetMachine> C(getThePPC64LETarget());
RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target());
RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target());
RegisterTargetMachine<PPCTargetMachine> C(getThePPC64LETarget());
PassRegistry &PR = *PassRegistry::getPassRegistry();
initializePPCBoolRetToIntPass(PR);
@ -224,26 +224,6 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT,
PPCTargetMachine::~PPCTargetMachine() = default;
void PPC32TargetMachine::anchor() {}
PPC32TargetMachine::PPC32TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
CodeModel::Model CM,
CodeGenOpt::Level OL)
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}
void PPC64TargetMachine::anchor() {}
PPC64TargetMachine::PPC64TargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
CodeModel::Model CM,
CodeGenOpt::Level OL)
: PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}
const PPCSubtarget *
PPCTargetMachine::getSubtargetImpl(const Function &F) const {
Attribute CPUAttr = F.getFnAttribute("target-cpu");

View File

@ -23,7 +23,7 @@ namespace llvm {
/// Common code between 32-bit and 64-bit PowerPC targets.
///
class PPCTargetMachine : public LLVMTargetMachine {
class PPCTargetMachine final : public LLVMTargetMachine {
public:
enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 };
private:
@ -60,29 +60,6 @@ public:
return false;
}
};
/// PowerPC 32-bit target machine.
///
class PPC32TargetMachine : public PPCTargetMachine {
virtual void anchor();
public:
PPC32TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
};
/// PowerPC 64-bit target machine.
///
class PPC64TargetMachine : public PPCTargetMachine {
virtual void anchor();
public:
PPC64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
Optional<Reloc::Model> RM, CodeModel::Model CM,
CodeGenOpt::Level OL);
};
} // end namespace llvm
#endif