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Prepare support for AltiVec multiply, divide, and sqrt.
llvm-svn: 24700
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@ -39,6 +39,10 @@ namespace llvm {
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/// of that FP value.
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FCTIDZ, FCTIWZ,
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// VMADDFP, VNMSUBFP - The VMADDFP and VNMSUBFP instructions, taking
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// three v4f32 operands and producing a v4f32 result.
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VMADDFP, VNMSUBFP,
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/// Hi/Lo - These represent the high and low 16-bit parts of a global
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/// address respectively. These nodes have two operands, the first of
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/// which must be a TargetGlobalAddress, and the second of which must be a
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@ -29,6 +29,8 @@ def PPCfsel : SDNode<"PPCISD::FSEL",
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def PPChi : SDNode<"PPCISD::Hi", SDTIntBinOp, []>;
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def PPClo : SDNode<"PPCISD::Lo", SDTIntBinOp, []>;
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def PPCvmaddfp : SDNode<"PPCISD::VMADDFP", SDTFPTernaryOp, []>;
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def PPCvnmsubfp : SDNode<"PPCISD::VNMSUBFP", SDTFPTernaryOp, []>;
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// These nodes represent the 32-bit PPC shifts that operate on 6-bit shift
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// amounts. These nodes are generated by the multi-precision shift code.
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@ -949,6 +951,14 @@ def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)),
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def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)),
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(ADDIS GPRC:$in, tconstpool:$g)>;
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// Fused multiply add and multiply sub for packed float. These are represented
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// separately from the real instructions above, for operations that must have
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// the additional precision, such as Newton-Rhapson (used by divide, sqrt)
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def : Pat<(PPCvmaddfp VRRC:$A, VRRC:$B, VRRC:$C),
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(VMADDFP VRRC:$A, VRRC:$B, VRRC:$C)>;
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def : Pat<(PPCvnmsubfp VRRC:$A, VRRC:$B, VRRC:$C),
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(VNMSUBFP VRRC:$A, VRRC:$B, VRRC:$C)>;
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// Standard shifts. These are represented separately from the real shifts above
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// so that we can distinguish between shifts that allow 5-bit and 6-bit shift
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// amounts.
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@ -82,6 +82,9 @@ def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
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def SDTFPBinOp : SDTypeProfile<1, 2, [ // fadd, fmul, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>
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]>;
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def SDTFPTernaryOp : SDTypeProfile<1, 3, [ // fmadd, fnmsub, etc.
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SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisFP<0>
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]>;
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def SDTIntUnaryOp : SDTypeProfile<1, 1, [ // ctlz
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SDTCisSameAs<0, 1>, SDTCisInt<0>
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]>;
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