1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00

IPRA: Allow target to enable IPRA by default

llvm-svn: 310876
This commit is contained in:
Matt Arsenault 2017-08-14 19:54:47 +00:00
parent 1de9fcc058
commit 1708c62dd1
3 changed files with 16 additions and 6 deletions

View File

@ -259,6 +259,12 @@ public:
/// PEI. If false (virtual-register machines), then callee-save register
/// spilling and scavenging are not needed or used.
virtual bool usesPhysRegsForPEI() const { return true; }
/// True if the target wants to use interprocedural register allocation by
/// default. The -enable-ipra flag can be used to override this.
virtual bool useIPRA() const {
return false;
}
};
/// This class describes a target machine that is implemented with the LLVM

View File

@ -47,6 +47,9 @@
using namespace llvm;
cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
cl::desc("Enable interprocedural register allocation "
"to reduce load/store at procedure calls."));
static cl::opt<bool> DisablePostRASched("disable-post-ra", cl::Hidden,
cl::desc("Disable Post Regalloc Scheduler"));
static cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden,
@ -362,6 +365,13 @@ TargetPassConfig::TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm)
if (StringRef(PrintMachineInstrs.getValue()).equals(""))
TM.Options.PrintMachineCode = true;
if (EnableIPRA.getNumOccurrences())
TM.Options.EnableIPRA = EnableIPRA;
else {
// If not explicitly specified, use target default.
TM.Options.EnableIPRA = TM.useIPRA();
}
if (TM.Options.EnableIPRA)
setRequiresCodeGenSCCOrder();

View File

@ -31,10 +31,6 @@
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
cl::opt<bool> EnableIPRA("enable-ipra", cl::init(false), cl::Hidden,
cl::desc("Enable interprocedural register allocation "
"to reduce load/store at procedure calls."));
//---------------------------------------------------------------------------
// TargetMachine Class
//
@ -45,8 +41,6 @@ TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString,
: TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU),
TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr),
RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) {
if (EnableIPRA.getNumOccurrences())
this->Options.EnableIPRA = EnableIPRA;
}
TargetMachine::~TargetMachine() {