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Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap.

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This caused the "use before a def" assertion on some programs.

With this patch, 254.gap now passes with the PPC backend.

llvm-svn: 21191
This commit is contained in:
Chris Lattner 2005-04-09 22:05:17 +00:00
parent ed826ae12c
commit 17c60891c1
1 changed files with 16 additions and 0 deletions
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16
lib/Target/PowerPC/PPC32ISelSimple.cpp
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@ -871,6 +871,16 @@ void PPC32ISel::LoadArgumentsToVirtualRegs(Function &Fn) {
void PPC32ISel::SelectPHINodes() {
const TargetInstrInfo &TII = *TM.getInstrInfo();
const Function &LF = *F->getFunction(); // The LLVM function...
MachineBasicBlock::iterator MFLRIt = F->begin()->begin();
if (GlobalBaseInitialized) {
// If we emitted a MFLR for the global base reg, get an iterator to an
// instruction after it.
while (MFLRIt->getOpcode() != PPC::MFLR)
++MFLRIt;
++MFLRIt; // step one MI past it.
}
for (Function::const_iterator I = LF.begin(), E = LF.end(); I != E; ++I) {
const BasicBlock *BB = I;
MachineBasicBlock &MBB = *MBBMap[I];
@ -938,6 +948,12 @@ void PPC32ISel::SelectPHINodes() {
while (PI != PredMBB->end() && PI->getOpcode() == PPC::PHI)
++PI;
// If this is the entry block, and if the entry block contains a
// MFLR instruction, emit this operation after it. This is needed
// because global addresses use it.
if (PredMBB == F->begin())
PI = MFLRIt;
ValReg = getReg(Val, PredMBB, PI);
}