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AVX-512: added cost for some AVX-512 instructions
llvm-svn: 217863
This commit is contained in:
Elena Demikhovsky
parent
b42946011d
commit
17fcb19667
@ -225,6 +225,15 @@ unsigned X86TTI::getArithmeticInstrCost(
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return LT.first * AVX2UniformConstCostTable[Idx].Cost;
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}
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static const CostTblEntry<MVT::SimpleValueType> AVX512CostTable[] = {
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{ ISD::SHL, MVT::v16i32, 1 },
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{ ISD::SRL, MVT::v16i32, 1 },
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{ ISD::SRA, MVT::v16i32, 1 },
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{ ISD::SHL, MVT::v8i64, 1 },
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{ ISD::SRL, MVT::v8i64, 1 },
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{ ISD::SRA, MVT::v8i64, 1 },
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};
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static const CostTblEntry<MVT::SimpleValueType> AVX2CostTable[] = {
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// Shifts on v4i64/v8i32 on AVX2 is legal even though we declare to
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// customize them to detect the cases where shift amount is a scalar one.
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@ -260,6 +269,11 @@ unsigned X86TTI::getArithmeticInstrCost(
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{ ISD::UDIV, MVT::v4i64, 4*20 },
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};
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if (ST->hasAVX512()) {
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int Idx = CostTableLookup(AVX512CostTable, ISD, LT.second);
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if (Idx != -1)
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return LT.first * AVX512CostTable[Idx].Cost;
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}
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// Look for AVX2 lowering tricks.
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if (ST->hasAVX2()) {
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if (ISD == ISD::SHL && LT.second == MVT::v16i16 &&
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@ -580,6 +594,38 @@ unsigned X86TTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const {
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return LTSrc.first * SSE2ConvTbl[Idx].Cost;
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}
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static const TypeConversionCostTblEntry<MVT::SimpleValueType>
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AVX512ConversionTbl[] = {
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{ ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 },
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{ ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 },
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{ ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 1 },
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{ ISD::FP_ROUND, MVT::v16f32, MVT::v8f64, 3 },
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{ ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 1 },
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{ ISD::TRUNCATE, MVT::v16i16, MVT::v16i32, 1 },
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{ ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, 1 },
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{ ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 1 },
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{ ISD::TRUNCATE, MVT::v16i32, MVT::v8i64, 4 },
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// v16i1 -> v16i32 - load + broadcast
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{ ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i1, 2 },
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{ ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i1, 2 },
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{ ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 1 },
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{ ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 1 },
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{ ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i16, 1 },
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{ ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i16, 1 },
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{ ISD::SIGN_EXTEND, MVT::v8i64, MVT::v16i32, 3 },
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{ ISD::ZERO_EXTEND, MVT::v8i64, MVT::v16i32, 3 },
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};
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if (ST->hasAVX512()) {
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int Idx = ConvertCostTableLookup(AVX512ConversionTbl, ISD, LTDest.second,
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LTSrc.second);
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if (Idx != -1)
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return AVX512ConversionTbl[Idx].Cost;
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}
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EVT SrcTy = TLI->getValueType(Src);
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EVT DstTy = TLI->getValueType(Dst);
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@ -612,6 +658,9 @@ unsigned X86TTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const {
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{ ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 2 },
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{ ISD::TRUNCATE, MVT::v8i16, MVT::v8i32, 2 },
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{ ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 4 },
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{ ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 3 },
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{ ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 3 },
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};
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static const TypeConversionCostTblEntry<MVT::SimpleValueType>
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@ -738,6 +787,19 @@ unsigned X86TTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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{ ISD::SETCC, MVT::v32i8, 1 },
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};
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static const CostTblEntry<MVT::SimpleValueType> AVX512CostTbl[] = {
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{ ISD::SETCC, MVT::v8i64, 1 },
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{ ISD::SETCC, MVT::v16i32, 1 },
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{ ISD::SETCC, MVT::v8f64, 1 },
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{ ISD::SETCC, MVT::v16f32, 1 },
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};
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if (ST->hasAVX512()) {
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int Idx = CostTableLookup(AVX512CostTbl, ISD, MTy);
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if (Idx != -1)
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return LT.first * AVX512CostTbl[Idx].Cost;
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}
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if (ST->hasAVX2()) {
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int Idx = CostTableLookup(AVX2CostTbl, ISD, MTy);
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if (Idx != -1)
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@ -1,3 +1,4 @@
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX512
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX2
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AVX
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@ -83,6 +84,19 @@ define i32 @zext_sext(<8 x i1> %in) {
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;CHECK-AVX: cost of 4 {{.*}} zext
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%D = zext <4 x i32> undef to <4 x i64>
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;CHECK-AVX512: cost of 3 {{.*}} %D1 = zext
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%D1 = zext <16 x i32> undef to <16 x i64>
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;CHECK-AVX512: cost of 3 {{.*}} %D2 = sext
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%D2 = sext <16 x i32> undef to <16 x i64>
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;CHECK-AVX512: cost of 1 {{.*}} %D3 = zext
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%D3 = zext <16 x i16> undef to <16 x i32>
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;CHECK-AVX512: cost of 1 {{.*}} %D4 = zext
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%D4 = zext <16 x i8> undef to <16 x i32>
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;CHECK-AVX512: cost of 2 {{.*}} %D5 = zext
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%D5 = zext <16 x i1> undef to <16 x i32>
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;CHECK-AVX2: cost of 2 {{.*}} trunc
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;CHECK-AVX: cost of 4 {{.*}} trunc
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%E = trunc <4 x i64> undef to <4 x i32>
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@ -101,8 +115,12 @@ define i32 @zext_sext(<8 x i1> %in) {
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;CHECK-AVX2: cost of 4 {{.*}} trunc
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;CHECK-AVX: cost of 9 {{.*}} trunc
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;CHECK_AVX512: cost of 1 {{.*}} G = trunc
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%G = trunc <8 x i64> undef to <8 x i32>
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;CHECK-AVX512: cost of 4 {{.*}} %G1 = trunc
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%G1 = trunc <16 x i64> undef to <16 x i32>
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ret i32 undef
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}
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@ -211,3 +229,24 @@ define void @uitofp8(<8 x i1> %a, <8 x i8> %b, <8 x i16> %c, <8 x i32> %d) {
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%D1 = uitofp <8 x i32> %d to <8 x float>
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ret void
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}
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define void @fp_conv(<8 x float> %a, <16 x float>%b) {
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;CHECK-LABEL: for function 'fp_conv'
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; CHECK-AVX512: cost of 1 {{.*}} fpext
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%A1 = fpext <8 x float> %a to <8 x double>
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; CHECK-AVX512: cost of 3 {{.*}} fpext
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%A2 = fpext <16 x float> %b to <16 x double>
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; CHECK-AVX2: cost of 3 {{.*}} %A3 = fpext
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; CHECK-AVX512: cost of 1 {{.*}} %A3 = fpext
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%A3 = fpext <8 x float> %a to <8 x double>
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; CHECK-AVX2: cost of 3 {{.*}} %A4 = fptrunc
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; CHECK-AVX512: cost of 1 {{.*}} %A4 = fptrunc
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%A4 = fptrunc <8 x double> undef to <8 x float>
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; CHECK-AVX512: cost of 3 {{.*}} %A5 = fptrunc
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%A5 = fptrunc <16 x double> undef to <16 x float>
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ret void
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}
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@ -1,5 +1,6 @@
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck -check-prefix=CHECK -check-prefix=AVX1 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx2 | FileCheck -check-prefix=CHECK -check-prefix=AVX2 %s
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=knl | FileCheck -check-prefix=CHECK -check-prefix=AVX512 %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.8.0"
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@ -22,6 +23,11 @@ define i32 @cmp(i32 %arg) {
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;AVX2: cost of 1 {{.*}} fcmp
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%E = fcmp olt <4 x double> undef, undef
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; AVX512: cost of 1 {{.*}} %E1 = fcmp
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%E1 = fcmp olt <16 x float> undef, undef
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; AVX512: cost of 2 {{.*}} %E2 = fcmp
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%E2 = fcmp olt <16 x double> undef, undef
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; -- integers --
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;AVX1: cost of 1 {{.*}} icmp
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@ -49,6 +55,11 @@ define i32 @cmp(i32 %arg) {
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;AVX2: cost of 1 {{.*}} icmp
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%M = icmp eq <32 x i8> undef, undef
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; AVX512: cost of 1 {{.*}} %M1 = icmp
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%M1 = icmp eq <16 x i32> undef, undef
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; AVX512: cost of 2 {{.*}} %M2 = icmp
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%M2 = icmp eq <16 x i64> undef, undef
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;CHECK: cost of 0 {{.*}} ret
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ret i32 undef
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}
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