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AMDGPU: Formatting fixes

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llvm-svn: 295783
This commit is contained in:
Matt Arsenault 2017-02-21 22:50:41 +00:00
parent c0dfae3f67
commit 180c1a1fd3
1 changed files with 5 additions and 4 deletions
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9
lib/Target/AMDGPU/SIISelLowering.cpp
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@ -1533,11 +1533,12 @@ static bool setM0ToIndexFromSGPR(const SIInstrInfo *TII,
}
if (Offset == 0) {
BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0).add(*Idx);
BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
.add(*Idx);
} else {
BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)
.add(*Idx)
.addImm(Offset);
.add(*Idx)
.addImm(Offset);
}
return true;
@ -2872,7 +2873,7 @@ SDValue SITargetLowering::LowerINTRINSIC_VOID(SDValue Op,
unsigned IntrinsicID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
switch (IntrinsicID) {
case Intrinsic::amdgcn_exp: {
case Intrinsic::amdgcn_exp: {
const ConstantSDNode *Tgt = cast<ConstantSDNode>(Op.getOperand(2));
const ConstantSDNode *En = cast<ConstantSDNode>(Op.getOperand(3));
const ConstantSDNode *Done = cast<ConstantSDNode>(Op.getOperand(8));