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[AArch64] fix IR names to not be 'tmp' because that gives the CHECK script problems
llvm-svn: 325718
This commit is contained in:
Sanjay Patel
parent
d6e84cb98a
commit
184a0b1e99
@ -11,22 +11,22 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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define void @wrap_mul4(double* nocapture %Out, [2 x double]* nocapture readonly %A, [4 x double]* nocapture readonly %B) {
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; CHECK-LABEL: @wrap_mul4(
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; CHECK-NEXT: [[ARRAYIDX1_I:%.*]] = getelementptr inbounds [2 x double], [2 x double]* [[A:%.*]], i64 0, i64 0
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; CHECK-NEXT: [[TMP:%.*]] = load double, double* [[ARRAYIDX1_I]], align 8
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; CHECK-NEXT: [[TEMP:%.*]] = load double, double* [[ARRAYIDX1_I]], align 8
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; CHECK-NEXT: [[ARRAYIDX3_I:%.*]] = getelementptr inbounds [4 x double], [4 x double]* [[B:%.*]], i64 0, i64 0
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; CHECK-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds [2 x double], [2 x double]* [[A]], i64 0, i64 1
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; CHECK-NEXT: [[TMP2:%.*]] = load double, double* [[ARRAYIDX5_I]], align 8
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; CHECK-NEXT: [[TEMP2:%.*]] = load double, double* [[ARRAYIDX5_I]], align 8
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; CHECK-NEXT: [[ARRAYIDX7_I:%.*]] = getelementptr inbounds [4 x double], [4 x double]* [[B]], i64 1, i64 0
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; CHECK-NEXT: [[ARRAYIDX13_I:%.*]] = getelementptr inbounds [4 x double], [4 x double]* [[B]], i64 0, i64 1
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[ARRAYIDX3_I]] to <2 x double>*
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; CHECK-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* [[TMP1]], align 8
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double [[TMP]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[TMP]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> undef, double [[TEMP]], i32 0
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; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x double> [[TMP3]], double [[TEMP]], i32 1
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP4]], [[TMP2]]
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; CHECK-NEXT: [[ARRAYIDX18_I:%.*]] = getelementptr inbounds [4 x double], [4 x double]* [[B]], i64 1, i64 1
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[ARRAYIDX7_I]] to <2 x double>*
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; CHECK-NEXT: [[TMP7:%.*]] = load <2 x double>, <2 x double>* [[TMP6]], align 8
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> undef, double [[TMP2]], i32 0
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; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x double> [[TMP8]], double [[TMP2]], i32 1
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; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> undef, double [[TEMP2]], i32 0
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; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x double> [[TMP8]], double [[TEMP2]], i32 1
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; CHECK-NEXT: [[TMP10:%.*]] = fmul <2 x double> [[TMP9]], [[TMP7]]
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; CHECK-NEXT: [[TMP11:%.*]] = fadd <2 x double> [[TMP5]], [[TMP10]]
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; CHECK-NEXT: [[ARRAYIDX25_I:%.*]] = getelementptr inbounds [4 x double], [4 x double]* [[B]], i64 0, i64 2
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@ -41,14 +41,14 @@ define void @wrap_mul4(double* nocapture %Out, [2 x double]* nocapture readonly
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; CHECK-NEXT: [[TMP17:%.*]] = fmul <2 x double> [[TMP9]], [[TMP16]]
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; CHECK-NEXT: [[TMP18:%.*]] = fadd <2 x double> [[TMP14]], [[TMP17]]
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; CHECK-NEXT: [[ARRAYIDX47_I:%.*]] = getelementptr inbounds [2 x double], [2 x double]* [[A]], i64 1, i64 0
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; CHECK-NEXT: [[TMP10:%.*]] = load double, double* [[ARRAYIDX47_I]], align 8
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; CHECK-NEXT: [[TEMP10:%.*]] = load double, double* [[ARRAYIDX47_I]], align 8
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; CHECK-NEXT: [[ARRAYIDX52_I:%.*]] = getelementptr inbounds [2 x double], [2 x double]* [[A]], i64 1, i64 1
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; CHECK-NEXT: [[TMP11:%.*]] = load double, double* [[ARRAYIDX52_I]], align 8
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; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x double> undef, double [[TMP10]], i32 0
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; CHECK-NEXT: [[TMP20:%.*]] = insertelement <2 x double> [[TMP19]], double [[TMP10]], i32 1
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; CHECK-NEXT: [[TEMP11:%.*]] = load double, double* [[ARRAYIDX52_I]], align 8
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; CHECK-NEXT: [[TMP19:%.*]] = insertelement <2 x double> undef, double [[TEMP10]], i32 0
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; CHECK-NEXT: [[TMP20:%.*]] = insertelement <2 x double> [[TMP19]], double [[TEMP10]], i32 1
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; CHECK-NEXT: [[TMP21:%.*]] = fmul <2 x double> [[TMP2]], [[TMP20]]
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; CHECK-NEXT: [[TMP22:%.*]] = insertelement <2 x double> undef, double [[TMP11]], i32 0
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; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x double> [[TMP22]], double [[TMP11]], i32 1
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; CHECK-NEXT: [[TMP22:%.*]] = insertelement <2 x double> undef, double [[TEMP11]], i32 0
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; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x double> [[TMP22]], double [[TEMP11]], i32 1
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; CHECK-NEXT: [[TMP24:%.*]] = fmul <2 x double> [[TMP7]], [[TMP23]]
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; CHECK-NEXT: [[TMP25:%.*]] = fadd <2 x double> [[TMP21]], [[TMP24]]
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; CHECK-NEXT: [[TMP26:%.*]] = fmul <2 x double> [[TMP13]], [[TMP20]]
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@ -72,52 +72,52 @@ define void @wrap_mul4(double* nocapture %Out, [2 x double]* nocapture readonly
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; CHECK-NEXT: ret void
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;
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%arrayidx1.i = getelementptr inbounds [2 x double], [2 x double]* %A, i64 0, i64 0
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%tmp = load double, double* %arrayidx1.i, align 8
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%temp = load double, double* %arrayidx1.i, align 8
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%arrayidx3.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 0, i64 0
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%tmp1 = load double, double* %arrayidx3.i, align 8
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%mul.i = fmul double %tmp, %tmp1
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%temp1 = load double, double* %arrayidx3.i, align 8
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%mul.i = fmul double %temp, %temp1
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%arrayidx5.i = getelementptr inbounds [2 x double], [2 x double]* %A, i64 0, i64 1
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%tmp2 = load double, double* %arrayidx5.i, align 8
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%temp2 = load double, double* %arrayidx5.i, align 8
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%arrayidx7.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 1, i64 0
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%tmp3 = load double, double* %arrayidx7.i, align 8
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%mul8.i = fmul double %tmp2, %tmp3
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%temp3 = load double, double* %arrayidx7.i, align 8
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%mul8.i = fmul double %temp2, %temp3
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%add.i = fadd double %mul.i, %mul8.i
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%arrayidx13.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 0, i64 1
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%tmp4 = load double, double* %arrayidx13.i, align 8
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%mul14.i = fmul double %tmp, %tmp4
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%temp4 = load double, double* %arrayidx13.i, align 8
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%mul14.i = fmul double %temp, %temp4
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%arrayidx18.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 1, i64 1
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%tmp5 = load double, double* %arrayidx18.i, align 8
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%mul19.i = fmul double %tmp2, %tmp5
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%temp5 = load double, double* %arrayidx18.i, align 8
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%mul19.i = fmul double %temp2, %temp5
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%add20.i = fadd double %mul14.i, %mul19.i
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%arrayidx25.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 0, i64 2
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%tmp6 = load double, double* %arrayidx25.i, align 8
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%mul26.i = fmul double %tmp, %tmp6
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%temp6 = load double, double* %arrayidx25.i, align 8
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%mul26.i = fmul double %temp, %temp6
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%arrayidx30.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 1, i64 2
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%tmp7 = load double, double* %arrayidx30.i, align 8
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%mul31.i = fmul double %tmp2, %tmp7
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%temp7 = load double, double* %arrayidx30.i, align 8
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%mul31.i = fmul double %temp2, %temp7
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%add32.i = fadd double %mul26.i, %mul31.i
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%arrayidx37.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 0, i64 3
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%tmp8 = load double, double* %arrayidx37.i, align 8
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%mul38.i = fmul double %tmp, %tmp8
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%temp8 = load double, double* %arrayidx37.i, align 8
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%mul38.i = fmul double %temp, %temp8
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%arrayidx42.i = getelementptr inbounds [4 x double], [4 x double]* %B, i64 1, i64 3
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%tmp9 = load double, double* %arrayidx42.i, align 8
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%mul43.i = fmul double %tmp2, %tmp9
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%temp9 = load double, double* %arrayidx42.i, align 8
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%mul43.i = fmul double %temp2, %temp9
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%add44.i = fadd double %mul38.i, %mul43.i
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%arrayidx47.i = getelementptr inbounds [2 x double], [2 x double]* %A, i64 1, i64 0
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%tmp10 = load double, double* %arrayidx47.i, align 8
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%mul50.i = fmul double %tmp1, %tmp10
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%temp10 = load double, double* %arrayidx47.i, align 8
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%mul50.i = fmul double %temp1, %temp10
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%arrayidx52.i = getelementptr inbounds [2 x double], [2 x double]* %A, i64 1, i64 1
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%tmp11 = load double, double* %arrayidx52.i, align 8
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%mul55.i = fmul double %tmp3, %tmp11
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%temp11 = load double, double* %arrayidx52.i, align 8
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%mul55.i = fmul double %temp3, %temp11
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%add56.i = fadd double %mul50.i, %mul55.i
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%mul62.i = fmul double %tmp4, %tmp10
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%mul67.i = fmul double %tmp5, %tmp11
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%mul62.i = fmul double %temp4, %temp10
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%mul67.i = fmul double %temp5, %temp11
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%add68.i = fadd double %mul62.i, %mul67.i
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%mul74.i = fmul double %tmp6, %tmp10
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%mul79.i = fmul double %tmp7, %tmp11
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%mul74.i = fmul double %temp6, %temp10
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%mul79.i = fmul double %temp7, %temp11
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%add80.i = fadd double %mul74.i, %mul79.i
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%mul86.i = fmul double %tmp8, %tmp10
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%mul91.i = fmul double %tmp9, %tmp11
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%mul86.i = fmul double %temp8, %temp10
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%mul91.i = fmul double %temp9, %temp11
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%add92.i = fadd double %mul86.i, %mul91.i
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store double %add.i, double* %Out, align 8
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%Res.i.sroa.4.0.Out2.i.sroa_idx2 = getelementptr inbounds double, double* %Out, i64 1
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