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https://github.com/RPCS3/llvm-mirror.git
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Make analyzeBranch family of instruction names consistent
analyzeBranch was renamed to use lowercase first, rename the related set to match. llvm-svn: 281506
This commit is contained in:
parent
3b94dad7d3
commit
186940fec6
@ -462,7 +462,7 @@ public:
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/// condition. These operands can be passed to other TargetInstrInfo
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/// methods to create new branches.
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///
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/// Note that RemoveBranch and InsertBranch must be implemented to support
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/// Note that RemoveBranch and insertBranch must be implemented to support
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/// cases where this method returns success.
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///
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/// If AllowModify is true, then this routine is allowed to modify the basic
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@ -545,19 +545,19 @@ public:
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///
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/// The CFG information in MBB.Predecessors and MBB.Successors must be valid
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/// before calling this function.
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virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const {
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llvm_unreachable("Target didn't implement TargetInstrInfo::InsertBranch!");
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llvm_unreachable("Target didn't implement TargetInstrInfo::insertBranch!");
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}
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unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
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MachineBasicBlock *DestBB,
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const DebugLoc &DL,
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int *BytesAdded = nullptr) const {
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return InsertBranch(MBB, DestBB, nullptr,
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return insertBranch(MBB, DestBB, nullptr,
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ArrayRef<MachineOperand>(), DL, BytesAdded);
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}
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@ -517,12 +517,12 @@ static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
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if (TBB == NextBB && !Cond.empty() && !FBB) {
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if (!TII->ReverseBranchCondition(Cond)) {
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TII->RemoveBranch(*CurMBB);
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TII->InsertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
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TII->insertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
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return;
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}
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}
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}
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TII->InsertBranch(*CurMBB, SuccBB, nullptr,
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TII->insertBranch(*CurMBB, SuccBB, nullptr,
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SmallVector<MachineOperand, 0>(), dl);
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}
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@ -1110,7 +1110,7 @@ bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
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TII->RemoveBranch(*PBB);
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if (!Cond.empty())
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// reinsert conditional branch only, for now
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TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
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TII->insertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
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NewCond, dl);
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}
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@ -1329,7 +1329,7 @@ ReoptimizeBlock:
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TII->RemoveBranch(PrevBB);
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PriorCond.clear();
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if (PriorTBB != MBB)
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TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
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TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
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MadeChange = true;
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++NumBranchOpts;
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goto ReoptimizeBlock;
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@ -1385,7 +1385,7 @@ ReoptimizeBlock:
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if (PriorFBB == MBB) {
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DebugLoc dl = getBranchDebugLoc(PrevBB);
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TII->RemoveBranch(PrevBB);
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TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
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TII->insertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
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MadeChange = true;
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++NumBranchOpts;
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goto ReoptimizeBlock;
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@ -1399,7 +1399,7 @@ ReoptimizeBlock:
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if (!TII->ReverseBranchCondition(NewPriorCond)) {
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DebugLoc dl = getBranchDebugLoc(PrevBB);
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TII->RemoveBranch(PrevBB);
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TII->InsertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
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TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
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MadeChange = true;
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++NumBranchOpts;
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goto ReoptimizeBlock;
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@ -1437,7 +1437,7 @@ ReoptimizeBlock:
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DebugLoc dl = getBranchDebugLoc(PrevBB);
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TII->RemoveBranch(PrevBB);
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TII->InsertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
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TII->insertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
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// Move this block to the end of the function.
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MBB->moveAfter(&MF.back());
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@ -1504,7 +1504,7 @@ ReoptimizeBlock:
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if (!TII->ReverseBranchCondition(NewCond)) {
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DebugLoc dl = getBranchDebugLoc(*MBB);
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TII->RemoveBranch(*MBB);
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TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
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TII->insertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
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MadeChange = true;
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++NumBranchOpts;
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goto ReoptimizeBlock;
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@ -1552,7 +1552,7 @@ ReoptimizeBlock:
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}
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DebugLoc pdl = getBranchDebugLoc(PrevBB);
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TII->RemoveBranch(PrevBB);
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TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
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TII->insertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
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}
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// Iterate through all the predecessors, revectoring each in-turn.
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@ -1579,7 +1579,7 @@ ReoptimizeBlock:
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DebugLoc pdl = getBranchDebugLoc(*PMBB);
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TII->RemoveBranch(*PMBB);
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NewCurCond.clear();
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TII->InsertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
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TII->insertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
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MadeChange = true;
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++NumBranchOpts;
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PMBB->CorrectExtraCFGEdges(NewCurTBB, nullptr, false);
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@ -1599,7 +1599,7 @@ ReoptimizeBlock:
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}
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// Add the branch back if the block is more than just an uncond branch.
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TII->InsertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
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TII->insertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
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}
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}
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@ -1636,7 +1636,7 @@ ReoptimizeBlock:
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if (CurFallsThru) {
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MachineBasicBlock *NextBB = &*std::next(MBB->getIterator());
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CurCond.clear();
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TII->InsertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
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TII->insertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
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}
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MBB->moveAfter(PredBB);
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MadeChange = true;
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@ -574,7 +574,7 @@ void SSAIfConv::convertIf(SmallVectorImpl<MachineBasicBlock*> &RemovedBlocks) {
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// We need a branch to Tail, let code placement work it out later.
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DEBUG(dbgs() << "Converting to unconditional branch.\n");
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SmallVector<MachineOperand, 0> EmptyCond;
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TII->InsertBranch(*Head, Tail, nullptr, EmptyCond, HeadDL);
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TII->insertBranch(*Head, Tail, nullptr, EmptyCond, HeadDL);
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Head->addSuccessor(Tail);
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}
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DEBUG(dbgs() << *Head);
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@ -505,7 +505,7 @@ bool IfConverter::ReverseBranchCondition(BBInfo &BBI) const {
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DebugLoc dl; // FIXME: this is nowhere
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if (!TII->ReverseBranchCondition(BBI.BrCond)) {
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TII->RemoveBranch(*BBI.BB);
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TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
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TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
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std::swap(BBI.TrueBB, BBI.FalseBB);
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return true;
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}
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@ -1394,7 +1394,7 @@ static void InsertUncondBranch(MachineBasicBlock &MBB, MachineBasicBlock &ToMBB,
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const TargetInstrInfo *TII) {
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DebugLoc dl; // FIXME: this is nowhere
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SmallVector<MachineOperand, 0> NoCond;
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TII->InsertBranch(MBB, &ToMBB, nullptr, NoCond, dl);
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TII->insertBranch(MBB, &ToMBB, nullptr, NoCond, dl);
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}
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/// Remove true / false edges if either / both are no longer successors.
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@ -1667,7 +1667,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
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BBI.BB->setSuccProbability(NewTrueBBIter, NewNext);
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auto NewFalse = BBCvt * CvtFalse;
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TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
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TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
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BBI.BB->addSuccessor(CvtBBI->FalseBB, NewFalse);
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}
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@ -1951,7 +1951,7 @@ bool IfConverter::IfConvertForkedDiamond(
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// Add back the branch.
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// Debug location saved above when removing the branch from BBI2
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TII->InsertBranch(*BBI.BB, TrueBBI.TrueBB, TrueBBI.FalseBB,
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TII->insertBranch(*BBI.BB, TrueBBI.TrueBB, TrueBBI.FalseBB,
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TrueBBI.BrCond, dl);
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RemoveExtraEdges(BBI);
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@ -560,7 +560,7 @@ void ImplicitNullChecks::rewriteNullChecks(
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NC.getCheckOperation()->eraseFromParent();
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// Insert an *unconditional* branch to not-null successor.
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TII->InsertBranch(*NC.getCheckBlock(), NC.getNotNullSucc(), nullptr,
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TII->insertBranch(*NC.getCheckBlock(), NC.getNotNullSucc(), nullptr,
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/*Cond=*/None, DL);
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NumImplicitNullChecks++;
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@ -436,7 +436,7 @@ void MachineBasicBlock::updateTerminator() {
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// Finally update the unconditional successor to be reached via a branch
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// if it would not be reached by fallthrough.
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if (!isLayoutSuccessor(TBB))
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TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
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TII->insertBranch(*this, TBB, nullptr, Cond, DL);
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}
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return;
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}
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@ -449,10 +449,10 @@ void MachineBasicBlock::updateTerminator() {
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if (TII->ReverseBranchCondition(Cond))
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return;
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, FBB, nullptr, Cond, DL);
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TII->insertBranch(*this, FBB, nullptr, Cond, DL);
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} else if (isLayoutSuccessor(FBB)) {
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
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TII->insertBranch(*this, TBB, nullptr, Cond, DL);
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}
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return;
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}
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@ -479,7 +479,7 @@ void MachineBasicBlock::updateTerminator() {
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// Finally update the unconditional successor to be reached via a branch if
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// it would not be reached by fallthrough.
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if (!isLayoutSuccessor(TBB))
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TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
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TII->insertBranch(*this, TBB, nullptr, Cond, DL);
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return;
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}
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@ -488,7 +488,7 @@ void MachineBasicBlock::updateTerminator() {
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// change the conditional branch into unconditional branch.
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TII->RemoveBranch(*this);
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Cond.clear();
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TII->InsertBranch(*this, TBB, nullptr, Cond, DL);
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TII->insertBranch(*this, TBB, nullptr, Cond, DL);
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return;
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}
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@ -497,14 +497,14 @@ void MachineBasicBlock::updateTerminator() {
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if (TII->ReverseBranchCondition(Cond)) {
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// We can't reverse the condition, add an unconditional branch.
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Cond.clear();
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TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
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TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
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return;
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}
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, FallthroughBB, nullptr, Cond, DL);
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TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
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} else if (!isLayoutSuccessor(FallthroughBB)) {
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TII->RemoveBranch(*this);
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TII->InsertBranch(*this, TBB, FallthroughBB, Cond, DL);
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TII->insertBranch(*this, TBB, FallthroughBB, Cond, DL);
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}
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}
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@ -810,7 +810,7 @@ MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ,
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if (!NMBB->isLayoutSuccessor(Succ)) {
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SmallVector<MachineOperand, 4> Cond;
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const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
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TII->InsertBranch(*NMBB, Succ, nullptr, Cond, DL);
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TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL);
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if (Indexes) {
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for (MachineInstr &MI : NMBB->instrs()) {
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@ -1643,7 +1643,7 @@ void MachineBlockPlacement::optimizeBranches() {
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<< MBPI->getEdgeProbability(ChainBB, TBB) << "\n");
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DebugLoc dl; // FIXME: this is nowhere
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TII->RemoveBranch(*ChainBB);
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TII->InsertBranch(*ChainBB, FBB, TBB, Cond, dl);
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TII->insertBranch(*ChainBB, FBB, TBB, Cond, dl);
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ChainBB->updateTerminator();
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}
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}
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@ -2366,7 +2366,7 @@ void SwingSchedulerDAG::generateProlog(SMSchedule &Schedule, unsigned LastStage,
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unsigned numBranches = TII->RemoveBranch(*PreheaderBB);
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if (numBranches) {
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SmallVector<MachineOperand, 0> Cond;
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TII->InsertBranch(*PreheaderBB, PrologBBs[0], nullptr, Cond, DebugLoc());
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TII->insertBranch(*PreheaderBB, PrologBBs[0], nullptr, Cond, DebugLoc());
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}
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}
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@ -2453,12 +2453,12 @@ void SwingSchedulerDAG::generateEpilog(SMSchedule &Schedule, unsigned LastStage,
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// Create a branch to the new epilog from the kernel.
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// Remove the original branch and add a new branch to the epilog.
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TII->RemoveBranch(*KernelBB);
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TII->InsertBranch(*KernelBB, KernelBB, EpilogStart, Cond, DebugLoc());
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TII->insertBranch(*KernelBB, KernelBB, EpilogStart, Cond, DebugLoc());
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// Add a branch to the loop exit.
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if (EpilogBBs.size() > 0) {
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MachineBasicBlock *LastEpilogBB = EpilogBBs.back();
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SmallVector<MachineOperand, 4> Cond1;
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TII->InsertBranch(*LastEpilogBB, LoopExitBB, nullptr, Cond1, DebugLoc());
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TII->insertBranch(*LastEpilogBB, LoopExitBB, nullptr, Cond1, DebugLoc());
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}
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}
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@ -3013,12 +3013,12 @@ void SwingSchedulerDAG::addBranches(MBBVectorTy &PrologBBs,
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unsigned numAdded = 0;
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if (TargetRegisterInfo::isVirtualRegister(LC)) {
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Prolog->addSuccessor(Epilog);
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numAdded = TII->InsertBranch(*Prolog, Epilog, LastPro, Cond, DebugLoc());
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numAdded = TII->insertBranch(*Prolog, Epilog, LastPro, Cond, DebugLoc());
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} else if (j >= LCMin) {
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Prolog->addSuccessor(Epilog);
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Prolog->removeSuccessor(LastPro);
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LastEpi->removeSuccessor(Epilog);
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numAdded = TII->InsertBranch(*Prolog, Epilog, nullptr, Cond, DebugLoc());
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numAdded = TII->insertBranch(*Prolog, Epilog, nullptr, Cond, DebugLoc());
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removePhis(Epilog, LastEpi);
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// Remove the blocks that are no longer referenced.
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if (LastPro != LastEpi) {
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@ -3028,7 +3028,7 @@ void SwingSchedulerDAG::addBranches(MBBVectorTy &PrologBBs,
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LastPro->clear();
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LastPro->eraseFromParent();
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} else {
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numAdded = TII->InsertBranch(*Prolog, LastPro, nullptr, Cond, DebugLoc());
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numAdded = TII->insertBranch(*Prolog, LastPro, nullptr, Cond, DebugLoc());
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removePhis(Epilog, Prolog);
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}
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LastPro = Prolog;
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@ -1446,7 +1446,7 @@ void FastISel::fastEmitBranch(MachineBasicBlock *MSucc,
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// fall-through case, which needs no instructions.
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} else {
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// The unconditional branch case.
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TII.InsertBranch(*FuncInfo.MBB, MSucc, nullptr,
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TII.insertBranch(*FuncInfo.MBB, MSucc, nullptr,
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SmallVector<MachineOperand, 0>(), DbgLoc);
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}
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if (FuncInfo.BPI) {
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@ -726,7 +726,7 @@ bool TailDuplicator::duplicateSimpleBB(
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}
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if (PredTBB)
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TII->InsertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
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TII->insertBranch(*PredBB, PredTBB, PredFBB, PredCond, DebugLoc());
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TDBBs.push_back(PredBB);
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}
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@ -119,7 +119,7 @@ TargetInstrInfo::ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail,
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// If MBB isn't immediately before MBB, insert a branch to it.
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if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest))
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InsertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL);
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insertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL);
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MBB->addSuccessor(NewDest);
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}
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@ -303,7 +303,7 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
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TII->ReverseBranchCondition(Cond);
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int OldSize = 0, NewSize = 0;
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TII->RemoveBranch(*MBB, &OldSize);
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TII->InsertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
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TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
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BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
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return true;
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@ -345,7 +345,7 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
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MBBSize -= RemovedSize;
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int AddedSize = 0;
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TII->InsertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
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TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
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MBBSize += AddedSize;
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// Finally, keep the block offsets up to date.
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@ -350,14 +350,14 @@ void AArch64InstrInfo::instantiateCondBranch(
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}
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}
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unsigned AArch64InstrInfo::InsertBranch(MachineBasicBlock &MBB,
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unsigned AArch64InstrInfo::insertBranch(MachineBasicBlock &MBB,
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MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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ArrayRef<MachineOperand> Cond,
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const DebugLoc &DL,
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int *BytesAdded) const {
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// Shouldn't be a fall through.
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assert(TBB && "InsertBranch must not be told to insert a fallthrough");
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assert(TBB && "insertBranch must not be told to insert a fallthrough");
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if (!FBB) {
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if (Cond.empty()) // Unconditional branch?
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@ -185,7 +185,7 @@ public:
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bool AllowModify = false) const override;
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unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -731,13 +731,13 @@ MachineBasicBlock::iterator FindLastAluClause(MachineBasicBlock &MBB) {
|
||||
return MBB.end();
|
||||
}
|
||||
|
||||
unsigned R600InstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned R600InstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
if (!FBB) {
|
||||
|
@ -167,7 +167,7 @@ public:
|
||||
SmallVectorImpl<MachineOperand> &Cond,
|
||||
bool AllowModify) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -1125,7 +1125,7 @@ unsigned SIInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return Count;
|
||||
}
|
||||
|
||||
unsigned SIInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned SIInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
|
@ -166,7 +166,7 @@ public:
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -409,7 +409,7 @@ unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return 2;
|
||||
}
|
||||
|
||||
unsigned ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned ARMBaseInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -424,7 +424,7 @@ unsigned ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
bool isThumb = AFI->isThumbFunction() || AFI->isThumb2Function();
|
||||
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 2 || Cond.size() == 0) &&
|
||||
"ARM branch conditions have two components!");
|
||||
|
||||
|
@ -126,7 +126,7 @@ public:
|
||||
bool AllowModify = false) const override;
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -373,7 +373,7 @@ bool AVRInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned AVRInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned AVRInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -382,7 +382,7 @@ unsigned AVRInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 1 || Cond.size() == 0) &&
|
||||
"AVR branch conditions have one component!");
|
||||
|
||||
|
@ -94,7 +94,7 @@ public:
|
||||
MachineBasicBlock *&FBB,
|
||||
SmallVectorImpl<MachineOperand> &Cond,
|
||||
bool AllowModify = false) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -130,7 +130,7 @@ bool BPFInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned BPFInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned BPFInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -139,7 +139,7 @@ unsigned BPFInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
|
||||
if (Cond.empty()) {
|
||||
// Unconditional branch
|
||||
|
@ -51,7 +51,7 @@ public:
|
||||
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -1246,7 +1246,7 @@ bool HexagonHardwareLoops::convertToHardwareLoop(MachineLoop *L,
|
||||
if (LastI != LastMBB->end())
|
||||
LastI = LastMBB->erase(LastI);
|
||||
SmallVector<MachineOperand, 0> Cond;
|
||||
TII->InsertBranch(*LastMBB, BranchTarget, nullptr, Cond, LastIDL);
|
||||
TII->insertBranch(*LastMBB, BranchTarget, nullptr, Cond, LastIDL);
|
||||
}
|
||||
} else {
|
||||
// Conditional branch to loop start; just delete it.
|
||||
@ -1923,7 +1923,7 @@ MachineBasicBlock *HexagonHardwareLoops::createPreheaderForLoop(
|
||||
(void)NotAnalyzed; // suppress compiler warning
|
||||
assert (!NotAnalyzed && "Should be analyzable!");
|
||||
if (TB != Header && (Tmp2.empty() || FB != Header))
|
||||
TII->InsertBranch(*PB, NewPH, nullptr, EmptyCond, DL);
|
||||
TII->insertBranch(*PB, NewPH, nullptr, EmptyCond, DL);
|
||||
PB->ReplaceUsesOfBlockWith(Header, NewPH);
|
||||
}
|
||||
}
|
||||
@ -1935,10 +1935,10 @@ MachineBasicBlock *HexagonHardwareLoops::createPreheaderForLoop(
|
||||
(void)LatchNotAnalyzed; // suppress compiler warning
|
||||
assert (!LatchNotAnalyzed && "Should be analyzable!");
|
||||
if (!TB && !FB)
|
||||
TII->InsertBranch(*Latch, Header, nullptr, EmptyCond, DL);
|
||||
TII->insertBranch(*Latch, Header, nullptr, EmptyCond, DL);
|
||||
|
||||
// Finally, the branch from the preheader to the header.
|
||||
TII->InsertBranch(*NewPH, Header, nullptr, EmptyCond, DL);
|
||||
TII->insertBranch(*NewPH, Header, nullptr, EmptyCond, DL);
|
||||
NewPH->addSuccessor(Header);
|
||||
|
||||
MachineLoop *ParentLoop = L->getParentLoop();
|
||||
|
@ -560,7 +560,7 @@ unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return Count;
|
||||
}
|
||||
|
||||
unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned HexagonInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -569,7 +569,7 @@ unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned BOpc = Hexagon::J2_jump;
|
||||
unsigned BccOpc = Hexagon::J2_jumpt;
|
||||
assert(validateBranchCond(Cond) && "Invalid branching condition");
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// Check if ReverseBranchCondition has asked to reverse this branch
|
||||
@ -592,7 +592,7 @@ unsigned HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
MachineFunction::iterator(NewTBB) == ++MBB.getIterator()) {
|
||||
ReverseBranchCondition(Cond);
|
||||
RemoveBranch(MBB);
|
||||
return InsertBranch(MBB, TBB, nullptr, Cond, DL);
|
||||
return insertBranch(MBB, TBB, nullptr, Cond, DL);
|
||||
}
|
||||
BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB);
|
||||
} else if (isEndLoopN(Cond[0].getImm())) {
|
||||
|
@ -73,7 +73,7 @@ public:
|
||||
/// condition. These operands can be passed to other TargetInstrInfo
|
||||
/// methods to create new branches.
|
||||
///
|
||||
/// Note that RemoveBranch and InsertBranch must be implemented to support
|
||||
/// Note that RemoveBranch and insertBranch must be implemented to support
|
||||
/// cases where this method returns success.
|
||||
///
|
||||
/// If AllowModify is true, then this routine is allowed to modify the basic
|
||||
@ -100,7 +100,7 @@ public:
|
||||
/// cases where AnalyzeBranch doesn't apply because there was no original
|
||||
/// branch to analyze. At least this much must be implemented, else tail
|
||||
/// merging needs to be disabled.
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -558,7 +558,7 @@ LanaiInstrInfo::optimizeSelect(MachineInstr &MI,
|
||||
// - FalseBlock is set to the destination if condition evaluates to false (it
|
||||
// is the nullptr if the branch is unconditional);
|
||||
// - condition is populated with machine operands needed to generate the branch
|
||||
// to insert in InsertBranch;
|
||||
// to insert in insertBranch;
|
||||
// Returns: false if branch could successfully be analyzed.
|
||||
bool LanaiInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *&TrueBlock,
|
||||
@ -658,14 +658,14 @@ bool LanaiInstrInfo::ReverseBranchCondition(
|
||||
// Insert the branch with condition specified in condition and given targets
|
||||
// (TrueBlock and FalseBlock). This function returns the number of machine
|
||||
// instructions inserted.
|
||||
unsigned LanaiInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned LanaiInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TrueBlock,
|
||||
MachineBasicBlock *FalseBlock,
|
||||
ArrayRef<MachineOperand> Condition,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TrueBlock && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TrueBlock && "insertBranch must not be told to insert a fallthrough");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// If condition is empty then an unconditional branch is being inserted.
|
||||
|
@ -133,7 +133,7 @@ public:
|
||||
bool ReverseBranchCondition(
|
||||
SmallVectorImpl<MachineOperand> &Condition) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock,
|
||||
MachineBasicBlock *FalseBlock,
|
||||
ArrayRef<MachineOperand> Condition,
|
||||
const DebugLoc &DL,
|
||||
|
@ -263,14 +263,14 @@ bool MSP430InstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned MSP430InstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 1 || Cond.size() == 0) &&
|
||||
"MSP430 branch conditions have one component!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -81,7 +81,7 @@ public:
|
||||
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -113,14 +113,14 @@ void MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MIB.addMBB(TBB);
|
||||
}
|
||||
|
||||
unsigned MipsInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned MipsInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// # of condition operands:
|
||||
|
@ -58,7 +58,7 @@ public:
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -143,7 +143,7 @@ bool NVPTXInstrInfo::CanTailMerge(const MachineInstr *MI) const {
|
||||
/// operands can be passed to other TargetInstrInfo methods to create new
|
||||
/// branches.
|
||||
///
|
||||
/// Note that RemoveBranch and InsertBranch must be implemented to support
|
||||
/// Note that RemoveBranch and insertBranch must be implemented to support
|
||||
/// cases where this method returns success.
|
||||
///
|
||||
bool NVPTXInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
@ -231,7 +231,7 @@ unsigned NVPTXInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return 2;
|
||||
}
|
||||
|
||||
unsigned NVPTXInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned NVPTXInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -240,7 +240,7 @@ unsigned NVPTXInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 1 || Cond.size() == 0) &&
|
||||
"NVPTX branch conditions have two components!");
|
||||
|
||||
|
@ -65,7 +65,7 @@ public:
|
||||
bool AllowModify) const override;
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -637,14 +637,14 @@ unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return 2;
|
||||
}
|
||||
|
||||
unsigned PPCInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned PPCInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 2 || Cond.size() == 0) &&
|
||||
"PPC branch conditions have two components!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -170,7 +170,7 @@ public:
|
||||
bool AllowModify) const override;
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -240,13 +240,13 @@ bool SparcInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
return true;
|
||||
}
|
||||
|
||||
unsigned SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned SparcInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 1 || Cond.size() == 0) &&
|
||||
"Sparc branch conditions should have one component!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -73,7 +73,7 @@ public:
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -395,7 +395,7 @@ ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
|
||||
return false;
|
||||
}
|
||||
|
||||
unsigned SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned SystemZInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
@ -406,7 +406,7 @@ unsigned SystemZInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
// in the pipeline, if desired.
|
||||
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 2 || Cond.size() == 0) &&
|
||||
"SystemZ branch conditions have one component!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -166,7 +166,7 @@ public:
|
||||
bool AllowModify) const override;
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -164,7 +164,7 @@ unsigned WebAssemblyInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return Count;
|
||||
}
|
||||
|
||||
unsigned WebAssemblyInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned WebAssemblyInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
|
@ -50,7 +50,7 @@ public:
|
||||
bool AllowModify = false) const override;
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -4464,14 +4464,14 @@ unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
|
||||
return Count;
|
||||
}
|
||||
|
||||
unsigned X86InstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned X86InstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 1 || Cond.size() == 0) &&
|
||||
"X86 branch conditions have one component!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -337,7 +337,7 @@ public:
|
||||
|
||||
unsigned RemoveBranch(MachineBasicBlock &MBB,
|
||||
int *BytesRemoved = nullptr) const override;
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
@ -184,7 +184,7 @@ static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC)
|
||||
/// operands can be passed to other TargetInstrInfo methods to create new
|
||||
/// branches.
|
||||
///
|
||||
/// Note that RemoveBranch and InsertBranch must be implemented to support
|
||||
/// Note that RemoveBranch and insertBranch must be implemented to support
|
||||
/// cases where this method returns success.
|
||||
///
|
||||
bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
@ -269,14 +269,14 @@ bool XCoreInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
|
||||
return true;
|
||||
}
|
||||
|
||||
unsigned XCoreInstrInfo::InsertBranch(MachineBasicBlock &MBB,
|
||||
unsigned XCoreInstrInfo::insertBranch(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB,
|
||||
ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded) const {
|
||||
// Shouldn't be a fall through.
|
||||
assert(TBB && "InsertBranch must not be told to insert a fallthrough");
|
||||
assert(TBB && "insertBranch must not be told to insert a fallthrough");
|
||||
assert((Cond.size() == 2 || Cond.size() == 0) &&
|
||||
"Unexpected number of components!");
|
||||
assert(!BytesAdded && "code size not handled");
|
||||
|
@ -55,7 +55,7 @@ public:
|
||||
SmallVectorImpl<MachineOperand> &Cond,
|
||||
bool AllowModify) const override;
|
||||
|
||||
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
|
||||
MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
|
||||
const DebugLoc &DL,
|
||||
int *BytesAdded = nullptr) const override;
|
||||
|
Loading…
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Reference in New Issue
Block a user