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AArch64: expand G_DIVREM operations in GlobalISel
We don't have a specific instruction for these, so they should be expanded to whatever separate division & multiplication is needed.
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@ -159,7 +159,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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.widenScalarToNextPow2(0)
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.scalarize(0);
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getActionDefinitionsBuilder({G_SREM, G_UREM})
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getActionDefinitionsBuilder({G_SREM, G_UREM, G_SDIVREM, G_UDIVREM})
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.lowerFor({s1, s8, s16, s32, s64});
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getActionDefinitionsBuilder({G_SMULO, G_UMULO}).lowerFor({{s64, s1}});
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76
test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
Normal file
76
test/CodeGen/AArch64/GlobalISel/legalize-divrem.mir
Normal file
@ -0,0 +1,76 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=aarch64-- -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_udivrem_64
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: test_udivrem_64
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
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; CHECK: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[COPY]], [[COPY1]]
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; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[UDIV]], [[COPY1]]
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; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[MUL]]
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; CHECK: $x0 = COPY [[UDIV]](s64)
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; CHECK: $x1 = COPY [[SUB]](s64)
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%0:_(s64) = COPY $x0
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%1:_(s64) = COPY $x1
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%2:_(s64), %3:_(s64) = G_UDIVREM %0, %1
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$x0 = COPY %2(s64)
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$x1 = COPY %3(s64)
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...
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---
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name: test_sdivrem_32
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: test_sdivrem_32
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
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; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[TRUNC]], [[TRUNC1]]
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; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[SDIV]], [[TRUNC1]]
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; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[MUL]]
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; CHECK: $w0 = COPY [[SDIV]](s32)
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; CHECK: $w1 = COPY [[SUB]](s32)
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%0:_(s64) = COPY $x0
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%1:_(s64) = COPY $x1
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%2:_(s32) = G_TRUNC %0(s64)
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%3:_(s32) = G_TRUNC %1(s64)
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%4:_(s32), %5:_(s32) = G_SDIVREM %2, %3
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$w0 = COPY %4(s32)
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$w1 = COPY %5(s32)
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...
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---
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name: test_sdivrem_8
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: test_sdivrem_8
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
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; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC]], 8
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; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64)
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; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC1]], 8
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; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]]
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SDIV]](s32)
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; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC1]](s32)
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; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY2]], [[COPY3]]
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; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
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; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[MUL]](s32)
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; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY4]], [[COPY5]]
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; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[SUB]](s32)
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; CHECK: $w0 = COPY [[COPY2]](s32)
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; CHECK: $w1 = COPY [[COPY6]](s32)
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%0:_(s64) = COPY $x0
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%1:_(s64) = COPY $x1
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%2:_(s8) = G_TRUNC %0(s64)
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%3:_(s8) = G_TRUNC %1(s64)
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%4:_(s8), %5:_(s8) = G_SDIVREM %2, %3
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%6:_(s32) = G_ANYEXT %4(s8)
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%7:_(s32) = G_ANYEXT %5(s8)
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$w0 = COPY %6(s32)
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$w1 = COPY %7(s32)
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...
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@ -46,12 +46,14 @@
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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#
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# DEBUG-NEXT: G_SDIVREM (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. the first uncovered type index: 1, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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#
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# DEBUG-NEXT: G_UDIVREM (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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# DEBUG-NEXT: .. the first uncovered type index: 1, OK
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# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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#
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# DEBUG-NEXT: G_AND (opcode {{[0-9]+}}): 1 type index, 0 imm indices
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# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
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