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TargetRegisterInfo: Introduce PrintLaneMask.

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This makes it more convenient to print lane masks and lead to more
uniform printing.

llvm-svn: 248624
This commit is contained in:
Matthias Braun 2015-09-25 21:51:24 +00:00
parent 744bb44288
commit 18d6f29c07
10 changed files with 43 additions and 26 deletions
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18
include/llvm/Target/TargetRegisterInfo.h
View File

@ -1022,6 +1022,24 @@ static inline raw_ostream &operator<<(raw_ostream &OS,
return OS;
}
/// Helper class for printing lane masks.
///
/// They are currently printed out as hexadecimal numbers.
/// Usage: OS << PrintLaneMask(Mask);
class PrintLaneMask {
protected:
LaneBitmask LaneMask;
public:
PrintLaneMask(LaneBitmask LaneMask)
: LaneMask(LaneMask) {}
void print(raw_ostream&) const;
};
static inline raw_ostream &operator<<(raw_ostream &OS, const PrintLaneMask &P) {
P.print(OS);
return OS;
}
} // End llvm namespace
#endif

3
lib/CodeGen/LiveInterval.cpp
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@ -26,7 +26,6 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <algorithm>
@ -1066,7 +1065,7 @@ void LiveInterval::print(raw_ostream &OS) const {
super::print(OS);
// Print subranges
for (const SubRange &SR : subranges()) {
OS << format(" L%04X ", SR.LaneMask) << SR;
OS << " L" << PrintLaneMask(SR.LaneMask) << ' ' << SR;
}
}

3
lib/CodeGen/LiveIntervalAnalysis.cpp
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@ -32,7 +32,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
@ -995,7 +994,7 @@ private:
if (TargetRegisterInfo::isVirtualRegister(Reg)) {
dbgs() << PrintReg(Reg);
if (LaneMask != 0)
dbgs() << format(" L%04X", LaneMask);
dbgs() << " L" << PrintLaneMask(LaneMask);
} else {
dbgs() << PrintRegUnit(Reg, &TRI);
}

1
lib/CodeGen/LiveRegMatrix.cpp
View File

@ -17,7 +17,6 @@
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"

3
lib/CodeGen/MIRPrinter.cpp
View File

@ -28,7 +28,6 @@
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSlotTracker.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/YAMLTraits.h"
@ -481,7 +480,7 @@ void MIPrinter::print(const MachineBasicBlock &MBB) {
First = false;
printReg(LI.PhysReg, OS, TRI);
if (LI.LaneMask != ~0u)
OS << format(":%08X", LI.LaneMask);
OS << ':' << PrintLaneMask(LI.LaneMask);
}
OS << "\n";
HasLineAttributes = true;

3
lib/CodeGen/MachineBasicBlock.cpp
View File

@ -28,7 +28,6 @@
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
@ -288,7 +287,7 @@ void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
for (const auto &LI : make_range(livein_begin(), livein_end())) {
OS << ' ' << PrintReg(LI.PhysReg, TRI);
if (LI.LaneMask != ~0u)
OS << format(":%08X", LI.LaneMask);
OS << ':' << PrintLaneMask(LI.LaneMask);
}
OS << '\n';
}

5
lib/CodeGen/MachineVerifier.cpp
View File

@ -42,7 +42,6 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
@ -447,7 +446,7 @@ void MachineVerifier::report(const char *msg, const MachineBasicBlock *MBB,
errs() << "- liverange: " << LR << '\n';
errs() << "- register: " << PrintReg(Reg, TRI) << '\n';
if (LaneMask != 0)
errs() << "- lanemask: " << format("%04X\n", LaneMask);
errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n';
}
void MachineVerifier::report(const char *msg, const MachineFunction *MF,
@ -457,7 +456,7 @@ void MachineVerifier::report(const char *msg, const MachineFunction *MF,
errs() << "- liverange: " << LR << '\n';
errs() << "- register: " << PrintReg(Reg, TRI) << '\n';
if (LaneMask != 0)
errs() << "- lanemask: " << format("%04X\n", LaneMask);
errs() << "- lanemask: " << PrintLaneMask(LaneMask) << '\n';
}
void MachineVerifier::markReachable(const MachineBasicBlock *MBB) {

27
lib/CodeGen/RegisterCoalescer.cpp
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@ -32,7 +32,6 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
@ -806,13 +805,14 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
if (Common == 0)
continue;
DEBUG(
dbgs() << format("\t\tCopy+Merge %04X into %04X\n", BMask, Common));
DEBUG( dbgs() << "\t\tCopy_Merge " << PrintLaneMask(BMask)
<< " into " << PrintLaneMask(Common) << '\n');
LaneBitmask BRest = BMask & ~AMask;
LiveInterval::SubRange *CommonRange;
if (BRest != 0) {
SB.LaneMask = BRest;
DEBUG(dbgs() << format("\t\tReduce Lane to %04X\n", BRest));
DEBUG(dbgs() << "\t\tReduce Lane to " << PrintLaneMask(BRest)
<< '\n');
// Duplicate SubRange for newly merged common stuff.
CommonRange = IntB.createSubRangeFrom(Allocator, Common, SB);
} else {
@ -829,7 +829,7 @@ bool RegisterCoalescer::removeCopyByCommutingDef(const CoalescerPair &CP,
AMask &= ~BMask;
}
if (AMask != 0) {
DEBUG(dbgs() << format("\t\tNew Lane %04X\n", AMask));
DEBUG(dbgs() << "\t\tNew Lane " << PrintLaneMask(AMask) << '\n');
LiveRange *NewRange = IntB.createSubRange(Allocator, AMask);
VNInfo *BSubValNo = NewRange->getNextValue(CopyIdx, Allocator);
addSegmentsWithValNo(*NewRange, BSubValNo, SA, ASubValNo);
@ -1432,8 +1432,8 @@ bool RegisterCoalescer::joinCopy(MachineInstr *CopyMI, bool &Again) {
for (LiveInterval::SubRange &S : LI.subranges()) {
if ((S.LaneMask & ShrinkMask) == 0)
continue;
DEBUG(dbgs() << "Shrink LaneUses (Lane "
<< format("%04X", S.LaneMask) << ")\n");
DEBUG(dbgs() << "Shrink LaneUses (Lane " << PrintLaneMask(S.LaneMask)
<< ")\n");
LIS->shrinkToUses(S, LI.reg);
}
LI.removeEmptySubRanges();
@ -2388,7 +2388,7 @@ void JoinVals::pruneSubRegValues(LiveInterval &LI, LaneBitmask &ShrinkMask)
// copied and we must remove that subrange value as well.
VNInfo *ValueOut = Q.valueOutOrDead();
if (ValueOut != nullptr && Q.valueIn() == nullptr) {
DEBUG(dbgs() << "\t\tPrune sublane " << format("%04X", S.LaneMask)
DEBUG(dbgs() << "\t\tPrune sublane " << PrintLaneMask(S.LaneMask)
<< " at " << Def << "\n");
LIS->pruneValue(S, Def, nullptr);
DidPrune = true;
@ -2399,8 +2399,8 @@ void JoinVals::pruneSubRegValues(LiveInterval &LI, LaneBitmask &ShrinkMask)
// If a subrange ends at the copy, then a value was copied but only
// partially used later. Shrink the subregister range appropriately.
if (Q.valueIn() != nullptr && Q.valueOut() == nullptr) {
DEBUG(dbgs() << "\t\tDead uses at sublane "
<< format("%04X", S.LaneMask) << " at " << Def << "\n");
DEBUG(dbgs() << "\t\tDead uses at sublane " << PrintLaneMask(S.LaneMask)
<< " at " << Def << "\n");
ShrinkMask |= S.LaneMask;
}
}
@ -2531,14 +2531,15 @@ bool RegisterCoalescer::mergeSubRangeInto(LiveInterval &LI,
if (Common == 0)
continue;
DEBUG(dbgs() << format("\t\tCopy+Merge %04X into %04X\n", RMask, Common));
DEBUG(dbgs() << "\t\tCopy+Merge " << PrintLaneMask(RMask) << " into "
<< PrintLaneMask(Common) << '\n');
// LaneMask of subregisters contained in the R range but not in ToMerge,
// they have to split into their own subrange.
LaneBitmask LRest = RMask & ~LaneMask;
LiveInterval::SubRange *CommonRange;
if (LRest != 0) {
R.LaneMask = LRest;
DEBUG(dbgs() << format("\t\tReduce Lane to %04X\n", LRest));
DEBUG(dbgs() << "\t\tReduce Lane to " << PrintLaneMask(LRest) << '\n');
// Duplicate SubRange for newly merged common stuff.
CommonRange = LI.createSubRangeFrom(Allocator, Common, R);
} else {
@ -2553,7 +2554,7 @@ bool RegisterCoalescer::mergeSubRangeInto(LiveInterval &LI,
}
if (LaneMask != 0) {
DEBUG(dbgs() << format("\t\tNew Lane %04X\n", LaneMask));
DEBUG(dbgs() << "\t\tNew Lane " << PrintLaneMask(LaneMask) << '\n');
LI.createSubRangeFrom(Allocator, LaneMask, ToMerge);
}
return true;

1
lib/CodeGen/SpillPlacement.cpp
View File

@ -36,7 +36,6 @@
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/ManagedStatic.h"
using namespace llvm;

5
lib/CodeGen/TargetRegisterInfo.cpp
View File

@ -18,6 +18,7 @@
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/IR/Function.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetRegisterInfo.h"
@ -87,6 +88,10 @@ void PrintVRegOrUnit::print(raw_ostream &OS) const {
PrintRegUnit::print(OS);
}
void PrintLaneMask::print(raw_ostream &OS) const {
OS << format("%08X", LaneMask);
}
/// getAllocatableClass - Return the maximal subclass of the given register
/// class that is alloctable, or NULL.
const TargetRegisterClass *