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[mips] Range check simm10

Summary:

Reviewers: vkalintiris

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D18148

llvm-svn: 264279
This commit is contained in:
Daniel Sanders 2016-03-24 13:26:59 +00:00
parent b4f1778bd5
commit 18d884b124
4 changed files with 17 additions and 4 deletions

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@ -3781,6 +3781,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
case Match_UImm10_0:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected 10-bit unsigned immediate");
case Match_SImm10_0:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),
"expected 10-bit signed immediate");
case Match_UImm16:
case Match_UImm16_Relaxed:
return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo),

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@ -15,9 +15,6 @@
// Mips Operand, Complex Patterns and Transformations Definitions.
//===----------------------------------------------------------------------===//
// Signed Operand
def simm10_64 : Operand<i64>;
// Transformation Function - get Imm - 32.
def Subtract32 : SDNodeXForm<imm, [{
return getImm(N, (unsigned)N->getZExtValue() - 32);

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@ -465,11 +465,13 @@ def UImm16AsmOperandClass
: UImmAsmOperandClass<16, [UImm16RelaxedAsmOperandClass]>;
def ConstantUImm10AsmOperandClass
: ConstantUImmAsmOperandClass<10, [UImm16AsmOperandClass]>;
def ConstantSImm10AsmOperandClass
: ConstantSImmAsmOperandClass<10, [ConstantUImm10AsmOperandClass]>;
def ConstantSImm7Lsl2AsmOperandClass : AsmOperandClass {
let Name = "SImm7Lsl2";
let RenderMethod = "addImmOperands";
let PredicateMethod = "isScaledSImm<7, 2>";
let SuperClasses = [ConstantUImm10AsmOperandClass];
let SuperClasses = [ConstantSImm10AsmOperandClass];
let DiagnosticType = "SImm7_Lsl2";
}
def ConstantUImm8AsmOperandClass
@ -746,6 +748,13 @@ foreach I = {4, 5, 6} in
!cast<AsmOperandClass>("ConstantSImm" # I # "AsmOperandClass");
}
foreach I = {10} in
def simm # I # _64 : Operand<i64> {
let DecoderMethod = "DecodeSImmWithOffsetAndScale<" # I # ">";
let ParserMatchClass =
!cast<AsmOperandClass>("ConstantSImm" # I # "AsmOperandClass");
}
def simm7_lsl2 : Operand<OtherVT> {
let EncoderMethod = "getSImm7Lsl2Encoding";
let DecoderMethod = "DecodeSImmWithOffsetAndScale<" # I # ", 0, 4>";

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@ -17,3 +17,7 @@ foo:
ins $2, $3, 32, 1 # CHECK: :[[@LINE]]:17: error: expected 5-bit unsigned immediate
ins $2, $3, 0, -1 # CHECK: :[[@LINE]]:20: error: expected immediate in range 1 .. 32
ins $2, $3, 0, 33 # CHECK: :[[@LINE]]:20: error: expected immediate in range 1 .. 32
seqi $2, $3, -1025 # CHECK: :[[@LINE]]:18: error: expected 10-bit signed immediate
seqi $2, $3, 1024 # CHECK: :[[@LINE]]:18: error: expected 10-bit signed immediate
snei $2, $3, -1025 # CHECK: :[[@LINE]]:18: error: expected 10-bit signed immediate
snei $2, $3, 1024 # CHECK: :[[@LINE]]:18: error: expected 10-bit signed immediate