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fix calls that return f32

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llvm-svn: 25455
This commit is contained in:
Duraid Madina 2006-01-19 08:31:51 +00:00
parent ae31d4858b
commit 1946b2ff30
1 changed files with 7 additions and 2 deletions
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9
lib/Target/IA64/IA64ISelLowering.cpp
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@ -473,7 +473,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
SDOperand RetVal; SDOperand RetVal;
if (RetTyVT != MVT::isVoid) { if (RetTyVT != MVT::isVoid) {
switch (RetTyVT) { switch (RetTyVT) {
default: // assert(0 && "Unknown value type to return!"); default: assert(0 && "Unknown value type to return!");
case MVT::i1: { // bools are just like other integers (returned in r8) case MVT::i1: { // bools are just like other integers (returned in r8)
SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag); SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
InFlag = boolInR8.getValue(2); InFlag = boolInR8.getValue(2);
@ -491,7 +491,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag); RetVal = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag);
Chain = RetVal.getValue(1); Chain = RetVal.getValue(1);
// Add a note to keep track of whether it is sign or zero extended - TODO: bools // keep track of whether it is sign or zero extended (todo: bools?)
RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext, RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext,
MVT::i64, RetVal, DAG.getValueType(RetTyVT)); MVT::i64, RetVal, DAG.getValueType(RetTyVT));
RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal); RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal);
@ -501,6 +501,11 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain,
Chain = RetVal.getValue(1); Chain = RetVal.getValue(1);
InFlag = RetVal.getValue(2); // XXX dead InFlag = RetVal.getValue(2); // XXX dead
break; break;
case MVT::f32:
RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
Chain = RetVal.getValue(1);
RetVal = DAG.getNode(ISD::TRUNCATE, MVT::f32, RetVal);
break;
case MVT::f64: case MVT::f64:
RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag); RetVal = DAG.getCopyFromReg(Chain, IA64::F8, MVT::f64, InFlag);
Chain = RetVal.getValue(1); Chain = RetVal.getValue(1);