RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[mips][fastisel] Conditional moves do not have implicit operands.

Browse Source 
Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D19862

llvm-svn: 268730
This commit is contained in:
Daniel Sanders 2016-05-06 12:57:26 +00:00
parent 6ae1dde4c7
commit 198717c89c
2 changed files with 6 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
lib/Target/Mips/MipsFastISel.cpp
View File

@ -692,11 +692,10 @@ bool MipsFastISel::emitCmp(unsigned ResultReg, const CmpInst *CI) {
emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1);
emitInst(Opc).addReg(LeftReg).addReg(RightReg).addReg(
Mips::FCC0, RegState::ImplicitDefine);
MachineInstrBuilder MI = emitInst(CondMovOpc, ResultReg)
.addReg(RegWithOne)
.addReg(Mips::FCC0)
.addReg(RegWithZero, RegState::Implicit);
MI->tieOperands(0, 3);
emitInst(CondMovOpc, ResultReg)
.addReg(RegWithOne)
.addReg(Mips::FCC0)
.addReg(RegWithZero);
break;
}
}

4
test/CodeGen/Mips/Fast-ISel/fpcmpa.ll
View File

@ -1,7 +1,7 @@
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
; RUN: < %s | FileCheck %s
; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32 \
; RUN: < %s | FileCheck %s
; RUN: -verify-machineinstrs < %s | FileCheck %s
@f1 = common global float 0.000000e+00, align 4
@f2 = common global float 0.000000e+00, align 4