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When turning (ashr(shl(x, n), n)) into sext(trunc(x)), the width of the

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type to truncate to should be the number of bits of the value that are
preserved, not the number that are clobbered with sign-extension.
This fixes regressions in ldecod.

llvm-svn: 69704
This commit is contained in:
Dan Gohman 2009-04-21 20:18:36 +00:00
parent 1b37a864d2
commit 19990f2310
2 changed files with 30 additions and 1 deletions
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2
lib/Analysis/ScalarEvolution.cpp
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@ -2015,7 +2015,7 @@ SCEVHandle ScalarEvolutionsImpl::createSCEV(Value *V) {
if (Instruction *L = dyn_cast<Instruction>(U->getOperand(0)))
if (L->getOpcode() == Instruction::Shl &&
L->getOperand(1) == U->getOperand(1)) {
uint64_t Amt = CI->getZExtValue();
uint64_t Amt = getTypeSizeInBits(U->getType()) - CI->getZExtValue();
return
SE.getSignExtendExpr(SE.getTruncateExpr(getSCEV(L->getOperand(0)),
IntegerType::get(Amt)),

29
test/Analysis/ScalarEvolution/sext-inreg.ll Normal file
View File

@ -0,0 +1,29 @@
; RUN: llvm-as < %s | opt -analyze -scalar-evolution -disable-output \
; RUN: | grep {signextend \{0,+,199\}<bb> to i64} | count 2
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
define i64 @foo(i64* nocapture %x, i64 %n) nounwind {
entry:
%t0 = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
br i1 %t0, label %bb, label %return
bb: ; preds = %bb, %entry
%i.01 = phi i64 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
%t1 = shl i64 %i.01, 7 ; <i32> [#uses=1]
%t2 = ashr i64 %t1, 7 ; <i32> [#uses=1]
%s1 = shl i64 %i.01, 5 ; <i32> [#uses=1]
%s2 = ashr i64 %s1, 5 ; <i32> [#uses=1]
%t3 = getelementptr i64* %x, i64 %i.01 ; <i64*> [#uses=1]
store i64 0, i64* %t3, align 1
%indvar.next = add i64 %i.01, 199 ; <i32> [#uses=2]
%exitcond = icmp eq i64 %indvar.next, %n ; <i1> [#uses=1]
br i1 %exitcond, label %return, label %bb
return: ; preds = %bb, %entry
%p = phi i64 [ 0, %entry ], [ %t2, %bb ]
%q = phi i64 [ 0, %entry ], [ %s2, %bb ]
%v = xor i64 %p, %q
ret i64 %v
}