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AVX-512: fixed UINT_TO_FP operation for 512-bit types.
llvm-svn: 236955
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7152cdb17e
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@ -1301,6 +1301,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::UINT_TO_FP, MVT::v16i32, Legal);
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setOperationAction(ISD::UINT_TO_FP, MVT::v8i32, Legal);
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setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
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setOperationAction(ISD::UINT_TO_FP, MVT::v16i8, Custom);
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setOperationAction(ISD::UINT_TO_FP, MVT::v16i16, Custom);
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setOperationAction(ISD::FP_ROUND, MVT::v8f32, Legal);
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setOperationAction(ISD::FP_EXTEND, MVT::v8f32, Legal);
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@ -11793,6 +11795,11 @@ SDValue X86TargetLowering::lowerUINT_TO_FP_vec(SDValue Op,
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case MVT::v4i32:
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case MVT::v8i32:
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return lowerUINT_TO_FP_vXi32(Op, DAG, *Subtarget);
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case MVT::v16i8:
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case MVT::v16i16:
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if (Subtarget->hasAVX512())
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return DAG.getNode(ISD::UINT_TO_FP, dl, Op.getValueType(),
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DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v16i32, N0));
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}
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llvm_unreachable(nullptr);
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}
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@ -308,3 +308,20 @@ define <8 x double> @sitofp_8i1_double(<8 x double> %a) {
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%1 = sitofp <8 x i1> %cmpres to <8 x double>
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ret <8 x double> %1
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}
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; CHECK-LABEL: @uitofp_16i8
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; CHECK: vpmovzxbd
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; CHECK: vcvtudq2ps
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define <16 x float> @uitofp_16i8(<16 x i8>%a) {
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%b = uitofp <16 x i8> %a to <16 x float>
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ret <16 x float>%b
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}
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; CHECK-LABEL: @uitofp_16i16
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; CHECK: vpmovzxwd
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; CHECK: vcvtudq2ps
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define <16 x float> @uitofp_16i16(<16 x i16>%a) {
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%b = uitofp <16 x i16> %a to <16 x float>
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ret <16 x float>%b
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}
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