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[ARM][ParallelDSP] Disable for big-endian

Bail early when we don't have a preheader and also if the target is
big endian because it's written with only little endian in mind!

Differential Revision: https://reviews.llvm.org/D59368

llvm-svn: 356243
This commit is contained in:
Sam Parker 2019-03-15 10:19:32 +00:00
parent 9f97fe13bc
commit 1a293b1c13
6 changed files with 23 additions and 6 deletions

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@ -201,6 +201,12 @@ namespace {
return false;
}
// We need a preheader as getIncomingValueForBlock assumes there is one.
if (!TheLoop->getLoopPreheader()) {
LLVM_DEBUG(dbgs() << "No preheader found, bailing out\n");
return false;
}
Function &F = *Header->getParent();
M = F.getParent();
DL = &M->getDataLayout();
@ -220,6 +226,12 @@ namespace {
return false;
}
if (!ST->isLittle()) {
LLVM_DEBUG(dbgs() << "Only supporting little endian: not running pass "
"ARMParallelDSP\n");
return false;
}
LoopAccessInfo LAI(L, SE, TLI, AA, DT, LI);
LLVM_DEBUG(dbgs() << "\n== Parallel DSP pass ==\n");
@ -454,12 +466,6 @@ static void MatchReductions(Function &F, Loop *TheLoop, BasicBlock *Header,
F.getFnAttribute("no-nans-fp-math").getValueAsString() == "true";
const BasicBlock *Latch = TheLoop->getLoopLatch();
// We need a preheader as getIncomingValueForBlock assumes there is one.
if (!TheLoop->getLoopPreheader()) {
LLVM_DEBUG(dbgs() << "No preheader found, bailing out\n");
return;
}
for (PHINode &Phi : Header->phis()) {
const auto *Ty = Phi.getType();
if (!Ty->isIntegerTy(32) && !Ty->isIntegerTy(64))

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@ -1,4 +1,7 @@
; RUN: llc -O3 -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s
; RUN: llc -O3 -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
; CHECK-UNSUPPORTED-NOT: smlad
; CHECK-LABEL: add_user
; CHECK: %for.body

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@ -1,4 +1,5 @@
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
;
; The Cortex-M0 does not support unaligned accesses:
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED

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@ -1,6 +1,7 @@
; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -arm-parallel-dsp %s -S -o - | FileCheck %s
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
define i32 @smladx(i16* nocapture readonly %pIn1, i16* nocapture readonly %pIn2, i32 %j, i32 %limit) {

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@ -1,4 +1,5 @@
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
; RUN: opt -mtriple=armeb-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
;
; The Cortex-M0 does not support unaligned accesses:
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED

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@ -1,9 +1,14 @@
; RUN: llc -O3 -mtriple=thumbv7em %s -o - | FileCheck %s
; RUN: llc -O3 -mtriple=thumbv7eb %s -o - | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
; RUN: llc -O3 -mtriple=thumbv8m.main -mattr=+dsp %s -o - | FileCheck %s
; CHECK-UNSUPPORTED-LABEL: unroll_n_jam_smlad
; CHECK-UNSUPPORTED-NOT: smlad r{{.}}
; Test that the duplicate loads are removed, which allows parallel dsp to find
; the parallel operations.
; CHECK-LABEL: unroll_n_jam_smlad
define void @unroll_n_jam_smlad(i32* %res, i16* %A, i16* %B, i32 %N, i32 %idx) {
entry:
%xtraiter306.i = and i32 %N, 3