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MIRVRegNamerUtils.h - remove unnecessary includes. NFC.

Replace with forward declarations or push down to MIRVRegNamerUtils.cpp where necessary.
This commit is contained in:
Simon Pilgrim 2020-04-20 14:33:21 +01:00
parent 651fd597ec
commit 1a52e13cf6
2 changed files with 13 additions and 7 deletions

View File

@ -7,6 +7,8 @@
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
#include "MIRVRegNamerUtils.h" #include "MIRVRegNamerUtils.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Constants.h"
#include "llvm/Support/Debug.h" #include "llvm/Support/Debug.h"
using namespace llvm; using namespace llvm;

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@ -17,15 +17,18 @@
#ifndef LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H #ifndef LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H
#define LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H #define LLVM_LIB_CODEGEN_MIRVREGNAMERUTILS_H
#include "llvm/ADT/PostOrderIterator.h" #include "llvm/CodeGen/Register.h"
#include "llvm/ADT/STLExtras.h" #include <map>
#include "llvm/CodeGen/MachineFunctionPass.h" #include <vector>
#include "llvm/CodeGen/MachineInstrBuilder.h" #include <string>
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm { namespace llvm {
class MachineBasicBlock;
class MachineInstr;
class MachineRegisterInfo;
class StringRef;
/// VRegRenamer - This class is used for renaming vregs in a machine basic /// VRegRenamer - This class is used for renaming vregs in a machine basic
/// block according to semantics of the instruction. /// block according to semantics of the instruction.
class VRegRenamer { class VRegRenamer {
@ -71,6 +74,7 @@ class VRegRenamer {
/// Create a vreg with name and return it. /// Create a vreg with name and return it.
unsigned createVirtualRegisterWithLowerName(unsigned VReg, StringRef Name); unsigned createVirtualRegisterWithLowerName(unsigned VReg, StringRef Name);
/// Linearly traverse the MachineBasicBlock and rename each instruction's /// Linearly traverse the MachineBasicBlock and rename each instruction's
/// vreg definition based on the semantics of the instruction. /// vreg definition based on the semantics of the instruction.
/// Names are as follows bb<BBNum>_hash_[0-9]+ /// Names are as follows bb<BBNum>_hash_[0-9]+