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Fix a bootstrap failure.
Provide special isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE interfaces to explicitly request checking for post-frame ptr elimination operands. This uses a heuristic so it isn't reliable for correctness. llvm-svn: 87047
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@ -171,6 +171,14 @@ public:
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return 0;
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}
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/// isLoadFromStackSlotPostFE - Check for post-frame ptr elimination
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/// stack locations as well. This uses a heuristic so it isn't
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/// reliable for correctness.
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virtual unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const {
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return 0;
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}
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/// hasLoadFromStackSlot - If the specified machine instruction has
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/// a load from a stack slot, return true along with the FrameIndex
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/// of the loaded stack slot. If not, return false. Unlike
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@ -192,6 +200,14 @@ public:
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return 0;
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}
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/// isStoreToStackSlotPostFE - Check for post-frame ptr elimination
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/// stack locations as well. This uses a heuristic so it isn't
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/// reliable for correctness.
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virtual unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const {
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return 0;
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}
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/// hasStoreToStackSlot - If the specified machine instruction has a
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/// store to a stack slot, return true along with the FrameIndex of
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/// the loaded stack slot. If not, return false. Unlike
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@ -726,9 +726,8 @@ bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
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return false;
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}
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unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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static bool isFrameLoadOpcode(int Opcode) {
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switch (Opcode) {
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default: break;
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case X86::MOV8rm:
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case X86::MOV16rm:
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@ -742,12 +741,49 @@ unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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case X86::MOVDQArm:
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case X86::MMX_MOVD64rm:
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case X86::MMX_MOVQ64rm:
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if (isFrameOperand(MI, 1, FrameIndex)) {
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return true;
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break;
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}
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return false;
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}
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static bool isFrameStoreOpcode(int Opcode) {
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switch (Opcode) {
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default: break;
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case X86::MOV8mr:
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case X86::MOV16mr:
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case X86::MOV32mr:
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case X86::MOV64mr:
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case X86::ST_FpP64m:
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case X86::MOVSSmr:
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case X86::MOVSDmr:
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case X86::MOVAPSmr:
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case X86::MOVAPDmr:
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case X86::MOVDQAmr:
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case X86::MMX_MOVD64mr:
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case X86::MMX_MOVQ64mr:
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case X86::MMX_MOVNTQmr:
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return true;
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}
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return false;
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}
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unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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if (isFrameLoadOpcode(MI->getOpcode()))
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if (isFrameOperand(MI, 1, FrameIndex))
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return MI->getOperand(0).getReg();
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}
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return 0;
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}
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unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const {
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if (isFrameLoadOpcode(MI->getOpcode())) {
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unsigned Reg;
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if ((Reg = isLoadFromStackSlot(MI, FrameIndex)))
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return Reg;
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// Check for post-frame index elimination operations
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return hasLoadFromStackSlot(MI, FrameIndex);
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break;
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}
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return 0;
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}
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@ -770,27 +806,20 @@ bool X86InstrInfo::hasLoadFromStackSlot(const MachineInstr *MI,
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unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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default: break;
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case X86::MOV8mr:
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case X86::MOV16mr:
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case X86::MOV32mr:
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case X86::MOV64mr:
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case X86::ST_FpP64m:
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case X86::MOVSSmr:
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case X86::MOVSDmr:
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case X86::MOVAPSmr:
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case X86::MOVAPDmr:
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case X86::MOVDQAmr:
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case X86::MMX_MOVD64mr:
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case X86::MMX_MOVQ64mr:
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case X86::MMX_MOVNTQmr:
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if (isFrameOperand(MI, 0, FrameIndex)) {
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if (isFrameStoreOpcode(MI->getOpcode()))
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if (isFrameOperand(MI, 0, FrameIndex))
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return MI->getOperand(X86AddrNumOperands).getReg();
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}
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return 0;
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}
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unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const {
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if (isFrameStoreOpcode(MI->getOpcode())) {
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unsigned Reg;
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if ((Reg = isStoreToStackSlot(MI, FrameIndex)))
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return Reg;
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// Check for post-frame index elimination operations
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return hasStoreToStackSlot(MI, FrameIndex);
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break;
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}
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return 0;
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}
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@ -449,6 +449,11 @@ public:
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unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
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unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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/// isLoadFromStackSlotPostFE - Check for post-frame ptr elimination
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/// stack locations as well. This uses a heuristic so it isn't
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/// reliable for correctness.
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unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const;
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/// hasLoadFromStackSlot - If the specified machine instruction has
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/// a load from a stack slot, return true along with the FrameIndex
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@ -459,6 +464,11 @@ public:
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bool hasLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
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/// isStoreToStackSlotPostFE - Check for post-frame ptr elimination
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/// stack locations as well. This uses a heuristic so it isn't
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/// reliable for correctness.
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unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
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int &FrameIndex) const;
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/// hasStoreToStackSlot - If the specified machine instruction has a
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/// store to a stack slot, return true along with the FrameIndex of
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