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Fix llvm::ComputeNumSignBits with some operations and llvm.assume
Currently ComputeNumSignBits does early exit while processing some of the operations (add, sub, mul, and select). This prevents the function from using AssumptionCacheTracker if passed. Differential Revision: https://reviews.llvm.org/D49759 llvm-svn: 337936
This commit is contained in:
Stanislav Mekhanoshin
parent
d17e06c564
commit
1ac228fe82
@ -2337,7 +2337,7 @@ static unsigned ComputeNumSignBitsImpl(const Value *V, unsigned Depth,
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case Instruction::Select:
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Tmp = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q);
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if (Tmp == 1) return 1; // Early out.
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if (Tmp == 1) break;
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Tmp2 = ComputeNumSignBits(U->getOperand(2), Depth + 1, Q);
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return std::min(Tmp, Tmp2);
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@ -2345,7 +2345,7 @@ static unsigned ComputeNumSignBitsImpl(const Value *V, unsigned Depth,
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// Add can have at most one carry bit. Thus we know that the output
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// is, at worst, one more bit than the inputs.
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
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if (Tmp == 1) return 1; // Early out.
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if (Tmp == 1) break;
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// Special case decrementing a value (ADD X, -1):
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if (const auto *CRHS = dyn_cast<Constant>(U->getOperand(1)))
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@ -2365,12 +2365,12 @@ static unsigned ComputeNumSignBitsImpl(const Value *V, unsigned Depth,
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}
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Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q);
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if (Tmp2 == 1) return 1;
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if (Tmp2 == 1) break;
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return std::min(Tmp, Tmp2)-1;
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case Instruction::Sub:
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Tmp2 = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q);
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if (Tmp2 == 1) return 1;
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if (Tmp2 == 1) break;
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// Handle NEG.
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if (const auto *CLHS = dyn_cast<Constant>(U->getOperand(0)))
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@ -2393,15 +2393,15 @@ static unsigned ComputeNumSignBitsImpl(const Value *V, unsigned Depth,
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// Sub can have at most one carry bit. Thus we know that the output
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// is, at worst, one more bit than the inputs.
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Tmp = ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
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if (Tmp == 1) return 1; // Early out.
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if (Tmp == 1) break;
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return std::min(Tmp, Tmp2)-1;
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case Instruction::Mul: {
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// The output of the Mul can be at most twice the valid bits in the inputs.
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unsigned SignBitsOp0 = ComputeNumSignBits(U->getOperand(0), Depth + 1, Q);
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if (SignBitsOp0 == 1) return 1; // Early out.
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if (SignBitsOp0 == 1) break;
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unsigned SignBitsOp1 = ComputeNumSignBits(U->getOperand(1), Depth + 1, Q);
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if (SignBitsOp1 == 1) return 1;
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if (SignBitsOp1 == 1) break;
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unsigned OutValidBits =
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(TyBits - SignBitsOp0 + 1) + (TyBits - SignBitsOp1 + 1);
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return OutValidBits > TyBits ? 1 : TyBits - OutValidBits + 1;
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109
test/Analysis/ValueTracking/numsignbits-from-assume.ll
Normal file
109
test/Analysis/ValueTracking/numsignbits-from-assume.ll
Normal file
@ -0,0 +1,109 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @computeNumSignBits_add1(i32 %in) {
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; CHECK-LABEL: @computeNumSignBits_add1(
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[IN:%.*]], 1
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ADD]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[ADD]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%add = add i32 %in, 1
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%cond = icmp ule i32 %add, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %add, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_add2(i32 %in1, i32 %in2) {
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; CHECK-LABEL: @computeNumSignBits_add2(
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[IN1:%.*]], [[IN2:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ADD]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[ADD]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%add = add i32 %in1, %in2
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%cond = icmp ule i32 %add, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %add, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_sub1(i32 %in) {
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; CHECK-LABEL: @computeNumSignBits_sub1(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[IN:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[SUB]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[SUB]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%sub = sub i32 1, %in
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%cond = icmp ule i32 %sub, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %sub, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_sub2(i32 %in) {
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; CHECK-LABEL: @computeNumSignBits_sub2(
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; CHECK-NEXT: [[SUB:%.*]] = add i32 [[IN:%.*]], -1
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[SUB]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[SUB]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%sub = sub i32 %in, 1
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%cond = icmp ule i32 %sub, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %sub, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_sub3(i32 %in1, i32 %in2) {
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; CHECK-LABEL: @computeNumSignBits_sub3(
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; CHECK-NEXT: [[SUB:%.*]] = sub i32 [[IN1:%.*]], [[IN2:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[SUB]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[SUB]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%sub = sub i32 %in1, %in2
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%cond = icmp ule i32 %sub, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %sub, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_mul(i32 %in1, i32 %in2) {
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; CHECK-LABEL: @computeNumSignBits_mul(
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[IN1:%.*]], [[IN2:%.*]]
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[MUL]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[MUL]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%mul = mul i32 %in1, %in2
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%cond = icmp ule i32 %mul, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %mul, 3
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ret i32 %sh
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}
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define i32 @computeNumSignBits_select(i32 %in, i1 %s) {
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; CHECK-LABEL: @computeNumSignBits_select(
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[S:%.*]], i32 [[IN:%.*]], i32 1
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; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[SEL]], 43
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; CHECK-NEXT: call void @llvm.assume(i1 [[COND]])
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; CHECK-NEXT: [[SH:%.*]] = shl nuw nsw i32 [[SEL]], 3
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; CHECK-NEXT: ret i32 [[SH]]
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;
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%sel = select i1 %s, i32 %in, i32 1
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%cond = icmp ule i32 %sel, 42
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call void @llvm.assume(i1 %cond)
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%sh = shl i32 %sel, 3
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ret i32 %sh
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}
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declare void @llvm.assume(i1)
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