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https://github.com/RPCS3/llvm-mirror.git
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[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 303820
This commit is contained in:
Eugene Zelenko
parent
a4569f33dd
commit
1b906aeb05
@ -34,6 +34,7 @@
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namespace llvm {
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class AsmPrinterHandler;
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class BasicBlock;
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class BlockAddress;
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class Constant;
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class ConstantArray;
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@ -43,6 +44,7 @@ class DIEAbbrev;
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class DwarfDebug;
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class GCMetadataPrinter;
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class GlobalIndirectSymbol;
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class GlobalObject;
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class GlobalValue;
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class GlobalVariable;
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class GCStrategy;
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@ -65,6 +67,8 @@ class MCSubtargetInfo;
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class MCSymbol;
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class MCTargetOptions;
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class MDNode;
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class Module;
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class raw_ostream;
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class TargetLoweringObjectFile;
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class TargetMachine;
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@ -109,7 +113,7 @@ public:
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/// Map global GOT equivalent MCSymbols to GlobalVariables and keep track of
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/// its number of uses by other globals.
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typedef std::pair<const GlobalVariable *, unsigned> GOTEquivUsePair;
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using GOTEquivUsePair = std::pair<const GlobalVariable *, unsigned>;
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MapVector<const MCSymbol *, GOTEquivUsePair> GlobalGOTEquivs;
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/// Enable print [latency:throughput] in output
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@ -1,4 +1,4 @@
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//===-- AtomicExpandUtils.h - Utilities for expanding atomic instructions -===//
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//===- AtomicExpandUtils.h - Utilities for expanding atomic instructions --===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -7,19 +7,24 @@
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_ATOMICEXPANDUTILS_H
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#define LLVM_CODEGEN_ATOMICEXPANDUTILS_H
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/Support/AtomicOrdering.h"
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namespace llvm {
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class Value;
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class AtomicRMWInst;
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class AtomicRMWInst;
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class Value;
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/// Parameters (see the expansion example below):
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/// (the builder, %addr, %loaded, %new_val, ordering,
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/// /* OUT */ %success, /* OUT */ %new_loaded)
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typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
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AtomicOrdering, Value *&, Value *&)> CreateCmpXchgInstFun;
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using CreateCmpXchgInstFun =
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function_ref<void(IRBuilder<> &, Value *, Value *, Value *, AtomicOrdering,
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Value *&, Value *&)>;
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/// \brief Expand an atomic RMW instruction into a loop utilizing
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/// cmpxchg. You'll want to make sure your target machine likes cmpxchg
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@ -42,7 +47,8 @@ typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
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/// loop:
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/// %loaded = phi iN [ %init_loaded, %entry ], [ %new_loaded, %loop ]
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/// %new = some_op iN %loaded, %incr
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/// ; This is what -atomic-expand will produce using this function on i686 targets:
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/// ; This is what -atomic-expand will produce using this function on i686
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/// targets:
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/// %pair = cmpxchg iN* %addr, iN %loaded, iN %new_val
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/// %new_loaded = extractvalue { iN, i1 } %pair, 0
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/// %success = extractvalue { iN, i1 } %pair, 1
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@ -52,6 +58,8 @@ typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
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/// [...]
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///
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/// Returns true if the containing function was modified.
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bool
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expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun Factory);
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}
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bool expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun Factory);
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} // end namespace llvm
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#endif // LLVM_CODEGEN_ATOMICEXPANDUTILS_H
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@ -1,4 +1,4 @@
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//===--- lib/CodeGen/DIE.h - DWARF Info Entries -----------------*- C++ -*-===//
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//===- lib/CodeGen/DIE.h - DWARF Info Entries -------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -31,6 +31,7 @@
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#include <iterator>
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#include <new>
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#include <type_traits>
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#include <utility>
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#include <vector>
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namespace llvm {
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@ -53,11 +54,11 @@ class DIEAbbrevData {
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dwarf::Form Form;
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/// Dwarf attribute value for DW_FORM_implicit_const
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int64_t Value;
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int64_t Value = 0;
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public:
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DIEAbbrevData(dwarf::Attribute A, dwarf::Form F)
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: Attribute(A), Form(F), Value(0) {}
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: Attribute(A), Form(F) {}
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DIEAbbrevData(dwarf::Attribute A, int64_t V)
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: Attribute(A), Form(dwarf::DW_FORM_implicit_const), Value(V) {}
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@ -136,13 +137,14 @@ class DIEAbbrevSet {
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/// storage container.
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BumpPtrAllocator &Alloc;
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/// \brief FoldingSet that uniques the abbreviations.
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llvm::FoldingSet<DIEAbbrev> AbbreviationsSet;
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FoldingSet<DIEAbbrev> AbbreviationsSet;
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/// A list of all the unique abbreviations in use.
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std::vector<DIEAbbrev *> Abbreviations;
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public:
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DIEAbbrevSet(BumpPtrAllocator &A) : Alloc(A) {}
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~DIEAbbrevSet();
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/// Generate the abbreviation declaration for a DIE and return a pointer to
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/// the generated abbreviation.
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///
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@ -289,13 +291,11 @@ public:
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/// A pointer to another debug information entry. An instance of this class can
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/// also be used as a proxy for a debug information entry not yet defined
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/// (ie. types.)
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class DIE;
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class DIEEntry {
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DIE *Entry;
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DIEEntry() = delete;
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public:
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DIEEntry() = delete;
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explicit DIEEntry(DIE &E) : Entry(&E) {}
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DIE &getEntry() const { return *Entry; }
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@ -348,10 +348,10 @@ private:
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///
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/// All values that aren't standard layout (or are larger than 8 bytes)
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/// should be stored by reference instead of by value.
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typedef AlignedCharArrayUnion<DIEInteger, DIEString, DIEExpr, DIELabel,
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DIEDelta *, DIEEntry, DIEBlock *, DIELoc *,
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DIELocList>
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ValTy;
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using ValTy = AlignedCharArrayUnion<DIEInteger, DIEString, DIEExpr, DIELabel,
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DIEDelta *, DIEEntry, DIEBlock *,
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DIELoc *, DIELocList>;
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static_assert(sizeof(ValTy) <= sizeof(uint64_t) ||
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sizeof(ValTy) <= sizeof(void *),
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"Expected all large types to be stored via pointer");
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@ -486,10 +486,12 @@ struct IntrusiveBackListNode {
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};
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struct IntrusiveBackListBase {
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typedef IntrusiveBackListNode Node;
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using Node = IntrusiveBackListNode;
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Node *Last = nullptr;
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bool empty() const { return !Last; }
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void push_back(Node &N) {
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assert(N.Next.getPointer() == &N && "Expected unlinked node");
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assert(N.Next.getInt() == true && "Expected unlinked node");
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@ -505,6 +507,7 @@ struct IntrusiveBackListBase {
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template <class T> class IntrusiveBackList : IntrusiveBackListBase {
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public:
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using IntrusiveBackListBase::empty;
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void push_back(T &N) { IntrusiveBackListBase::push_back(N); }
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T &back() { return *static_cast<T *>(Last); }
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const T &back() const { return *static_cast<T *>(Last); }
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@ -513,6 +516,7 @@ public:
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class iterator
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: public iterator_facade_base<iterator, std::forward_iterator_tag, T> {
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friend class const_iterator;
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Node *N = nullptr;
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public:
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@ -585,10 +589,12 @@ public:
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class DIEValueList {
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struct Node : IntrusiveBackListNode {
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DIEValue V;
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explicit Node(DIEValue V) : V(V) {}
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};
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typedef IntrusiveBackList<Node> ListTy;
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using ListTy = IntrusiveBackList<Node>;
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ListTy List;
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public:
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@ -597,9 +603,10 @@ public:
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: public iterator_adaptor_base<value_iterator, ListTy::iterator,
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std::forward_iterator_tag, DIEValue> {
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friend class const_value_iterator;
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typedef iterator_adaptor_base<value_iterator, ListTy::iterator,
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std::forward_iterator_tag,
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DIEValue> iterator_adaptor;
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using iterator_adaptor =
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iterator_adaptor_base<value_iterator, ListTy::iterator,
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std::forward_iterator_tag, DIEValue>;
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public:
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value_iterator() = default;
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@ -612,9 +619,9 @@ public:
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class const_value_iterator : public iterator_adaptor_base<
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const_value_iterator, ListTy::const_iterator,
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std::forward_iterator_tag, const DIEValue> {
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typedef iterator_adaptor_base<const_value_iterator, ListTy::const_iterator,
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std::forward_iterator_tag,
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const DIEValue> iterator_adaptor;
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using iterator_adaptor =
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iterator_adaptor_base<const_value_iterator, ListTy::const_iterator,
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std::forward_iterator_tag, const DIEValue>;
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public:
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const_value_iterator() = default;
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@ -627,8 +634,8 @@ public:
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const DIEValue &operator*() const { return wrapped()->V; }
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};
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typedef iterator_range<value_iterator> value_range;
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typedef iterator_range<const_value_iterator> const_value_range;
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using value_range = iterator_range<value_iterator>;
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using const_value_range = iterator_range<const_value_iterator>;
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value_iterator addValue(BumpPtrAllocator &Alloc, const DIEValue &V) {
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List.push_back(*new (Alloc) Node(V));
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@ -657,15 +664,15 @@ class DIE : IntrusiveBackListNode, public DIEValueList {
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friend class DIEUnit;
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/// Dwarf unit relative offset.
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unsigned Offset;
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unsigned Offset = 0;
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/// Size of instance + children.
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unsigned Size;
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unsigned Size = 0;
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unsigned AbbrevNumber = ~0u;
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/// Dwarf tag code.
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dwarf::Tag Tag = (dwarf::Tag)0;
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/// Set to true to force a DIE to emit an abbreviation that says it has
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/// children even when it doesn't. This is used for unit testing purposes.
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bool ForceChildren;
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bool ForceChildren = false;
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/// Children DIEs.
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IntrusiveBackList<DIE> Children;
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@ -673,20 +680,19 @@ class DIE : IntrusiveBackListNode, public DIEValueList {
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/// DIEUnit which contains this DIE as its unit DIE.
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PointerUnion<DIE *, DIEUnit *> Owner;
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DIE() = delete;
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explicit DIE(dwarf::Tag Tag) : Offset(0), Size(0), Tag(Tag),
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ForceChildren(false) {}
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explicit DIE(dwarf::Tag Tag) : Tag(Tag) {}
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public:
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DIE() = delete;
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DIE(const DIE &RHS) = delete;
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DIE(DIE &&RHS) = delete;
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DIE &operator=(const DIE &RHS) = delete;
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DIE &operator=(const DIE &&RHS) = delete;
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static DIE *get(BumpPtrAllocator &Alloc, dwarf::Tag Tag) {
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return new (Alloc) DIE(Tag);
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}
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DIE(const DIE &RHS) = delete;
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DIE(DIE &&RHS) = delete;
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void operator=(const DIE &RHS) = delete;
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void operator=(const DIE &&RHS) = delete;
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// Accessors.
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unsigned getAbbrevNumber() const { return AbbrevNumber; }
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dwarf::Tag getTag() const { return Tag; }
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@ -696,10 +702,10 @@ public:
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bool hasChildren() const { return ForceChildren || !Children.empty(); }
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void setForceChildren(bool B) { ForceChildren = B; }
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typedef IntrusiveBackList<DIE>::iterator child_iterator;
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typedef IntrusiveBackList<DIE>::const_iterator const_child_iterator;
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typedef iterator_range<child_iterator> child_range;
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typedef iterator_range<const_child_iterator> const_child_range;
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using child_iterator = IntrusiveBackList<DIE>::iterator;
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using const_child_iterator = IntrusiveBackList<DIE>::const_iterator;
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using child_range = iterator_range<child_iterator>;
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using const_child_range = iterator_range<const_child_iterator>;
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child_range children() {
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return make_range(Children.begin(), Children.end());
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@ -838,10 +844,10 @@ struct BasicDIEUnit final : DIEUnit {
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/// DIELoc - Represents an expression location.
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//
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class DIELoc : public DIEValueList {
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mutable unsigned Size; // Size in bytes excluding size header.
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mutable unsigned Size = 0; // Size in bytes excluding size header.
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public:
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DIELoc() : Size(0) {}
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DIELoc() = default;
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/// ComputeSize - Calculate the size of the location expression.
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///
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@ -872,10 +878,10 @@ public:
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/// DIEBlock - Represents a block of values.
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//
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class DIEBlock : public DIEValueList {
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mutable unsigned Size; // Size in bytes excluding size header.
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mutable unsigned Size = 0; // Size in bytes excluding size header.
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public:
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DIEBlock() : Size(0) {}
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DIEBlock() = default;
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/// ComputeSize - Calculate the size of the location expression.
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///
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@ -56,7 +56,7 @@ private:
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HandlerOffsetExpr(HandlerOffset) {}
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};
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typedef std::vector<FaultInfo> FunctionFaultInfos;
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using FunctionFaultInfos = std::vector<FaultInfo>;
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// We'd like to keep a stable iteration order for FunctionInfos to help
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// FileCheck based testing.
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@ -78,20 +78,17 @@ private:
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/// generated by the version of LLVM that includes it. No guarantees are made
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/// with respect to forward or backward compatibility.
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class FaultMapParser {
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typedef uint8_t FaultMapVersionType;
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static const size_t FaultMapVersionOffset = 0;
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using FaultMapVersionType = uint8_t;
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using Reserved0Type = uint8_t;
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using Reserved1Type = uint16_t;
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using NumFunctionsType = uint32_t;
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typedef uint8_t Reserved0Type;
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static const size_t FaultMapVersionOffset = 0;
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static const size_t Reserved0Offset =
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FaultMapVersionOffset + sizeof(FaultMapVersionType);
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typedef uint16_t Reserved1Type;
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static const size_t Reserved1Offset = Reserved0Offset + sizeof(Reserved0Type);
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typedef uint32_t NumFunctionsType;
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static const size_t NumFunctionsOffset =
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Reserved1Offset + sizeof(Reserved1Type);
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static const size_t FunctionInfosOffset =
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NumFunctionsOffset + sizeof(NumFunctionsType);
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@ -105,14 +102,13 @@ class FaultMapParser {
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public:
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class FunctionFaultInfoAccessor {
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typedef uint32_t FaultKindType;
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static const size_t FaultKindOffset = 0;
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using FaultKindType = uint32_t;
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using FaultingPCOffsetType = uint32_t;
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using HandlerPCOffsetType = uint32_t;
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typedef uint32_t FaultingPCOffsetType;
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static const size_t FaultKindOffset = 0;
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static const size_t FaultingPCOffsetOffset =
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FaultKindOffset + sizeof(FaultKindType);
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typedef uint32_t HandlerPCOffsetType;
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static const size_t HandlerPCOffsetOffset =
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FaultingPCOffsetOffset + sizeof(FaultingPCOffsetType);
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@ -140,20 +136,17 @@ public:
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};
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class FunctionInfoAccessor {
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typedef uint64_t FunctionAddrType;
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static const size_t FunctionAddrOffset = 0;
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using FunctionAddrType = uint64_t;
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using NumFaultingPCsType = uint32_t;
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using ReservedType = uint32_t;
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typedef uint32_t NumFaultingPCsType;
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static const size_t FunctionAddrOffset = 0;
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static const size_t NumFaultingPCsOffset =
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FunctionAddrOffset + sizeof(FunctionAddrType);
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typedef uint32_t ReservedType;
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static const size_t ReservedOffset =
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NumFaultingPCsOffset + sizeof(NumFaultingPCsType);
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static const size_t FunctionFaultInfosOffset =
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ReservedOffset + sizeof(ReservedType);
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static const size_t FunctionInfoHeaderSize = FunctionFaultInfosOffset;
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const uint8_t *P = nullptr;
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@ -1,4 +1,4 @@
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//===-- llvm/CodeGen/LiveInterval.h - Interval representation ---*- C++ -*-===//
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//===- llvm/CodeGen/LiveInterval.h - Interval representation ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -21,22 +21,30 @@
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#ifndef LLVM_CODEGEN_LIVEINTERVAL_H
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#define LLVM_CODEGEN_LIVEINTERVAL_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/IntEqClasses.h"
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#include "llvm/ADT/iterator_range.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include "llvm/MC/LaneBitmask.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Support/MathExtras.h"
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#include <algorithm>
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#include <cassert>
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#include <climits>
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#include <cstddef>
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#include <functional>
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#include <memory>
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#include <set>
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#include <tuple>
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#include <utility>
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namespace llvm {
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class CoalescerPair;
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class LiveIntervals;
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class MachineInstr;
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class MachineRegisterInfo;
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class TargetRegisterInfo;
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class raw_ostream;
|
||||
template <typename T, unsigned Small> class SmallPtrSet;
|
||||
|
||||
/// VNInfo - Value Number Information.
|
||||
/// This class holds information about a machine level values, including
|
||||
@ -44,7 +52,7 @@ namespace llvm {
|
||||
///
|
||||
class VNInfo {
|
||||
public:
|
||||
typedef BumpPtrAllocator Allocator;
|
||||
using Allocator = BumpPtrAllocator;
|
||||
|
||||
/// The ID number of this value.
|
||||
unsigned id;
|
||||
@ -53,14 +61,10 @@ namespace llvm {
|
||||
SlotIndex def;
|
||||
|
||||
/// VNInfo constructor.
|
||||
VNInfo(unsigned i, SlotIndex d)
|
||||
: id(i), def(d)
|
||||
{ }
|
||||
VNInfo(unsigned i, SlotIndex d) : id(i), def(d) {}
|
||||
|
||||
/// VNInfo constructor, copies values from orig, except for the value number.
|
||||
VNInfo(unsigned i, const VNInfo &orig)
|
||||
: id(i), def(orig.def)
|
||||
{ }
|
||||
VNInfo(unsigned i, const VNInfo &orig) : id(i), def(orig.def) {}
|
||||
|
||||
/// Copy from the parameter into this VNInfo.
|
||||
void copyFrom(VNInfo &src) {
|
||||
@ -152,16 +156,16 @@ namespace llvm {
|
||||
/// segment with a new value number is used.
|
||||
class LiveRange {
|
||||
public:
|
||||
|
||||
/// This represents a simple continuous liveness interval for a value.
|
||||
/// The start point is inclusive, the end point exclusive. These intervals
|
||||
/// are rendered as [start,end).
|
||||
struct Segment {
|
||||
SlotIndex start; // Start point of the interval (inclusive)
|
||||
SlotIndex end; // End point of the interval (exclusive)
|
||||
VNInfo *valno; // identifier for the value contained in this segment.
|
||||
VNInfo *valno = nullptr; // identifier for the value contained in this
|
||||
// segment.
|
||||
|
||||
Segment() : valno(nullptr) {}
|
||||
Segment() = default;
|
||||
|
||||
Segment(SlotIndex S, SlotIndex E, VNInfo *V)
|
||||
: start(S), end(E), valno(V) {
|
||||
@ -189,8 +193,8 @@ namespace llvm {
|
||||
void dump() const;
|
||||
};
|
||||
|
||||
typedef SmallVector<Segment, 2> Segments;
|
||||
typedef SmallVector<VNInfo *, 2> VNInfoList;
|
||||
using Segments = SmallVector<Segment, 2>;
|
||||
using VNInfoList = SmallVector<VNInfo *, 2>;
|
||||
|
||||
Segments segments; // the liveness segments
|
||||
VNInfoList valnos; // value#'s
|
||||
@ -198,22 +202,24 @@ namespace llvm {
|
||||
// The segment set is used temporarily to accelerate initial computation
|
||||
// of live ranges of physical registers in computeRegUnitRange.
|
||||
// After that the set is flushed to the segment vector and deleted.
|
||||
typedef std::set<Segment> SegmentSet;
|
||||
using SegmentSet = std::set<Segment>;
|
||||
std::unique_ptr<SegmentSet> segmentSet;
|
||||
|
||||
typedef Segments::iterator iterator;
|
||||
using iterator = Segments::iterator;
|
||||
using const_iterator = Segments::const_iterator;
|
||||
|
||||
iterator begin() { return segments.begin(); }
|
||||
iterator end() { return segments.end(); }
|
||||
|
||||
typedef Segments::const_iterator const_iterator;
|
||||
const_iterator begin() const { return segments.begin(); }
|
||||
const_iterator end() const { return segments.end(); }
|
||||
|
||||
typedef VNInfoList::iterator vni_iterator;
|
||||
using vni_iterator = VNInfoList::iterator;
|
||||
using const_vni_iterator = VNInfoList::const_iterator;
|
||||
|
||||
vni_iterator vni_begin() { return valnos.begin(); }
|
||||
vni_iterator vni_end() { return valnos.end(); }
|
||||
|
||||
typedef VNInfoList::const_iterator const_vni_iterator;
|
||||
const_vni_iterator vni_begin() const { return valnos.begin(); }
|
||||
const_vni_iterator vni_end() const { return valnos.end(); }
|
||||
|
||||
@ -631,40 +637,37 @@ namespace llvm {
|
||||
/// or stack slot.
|
||||
class LiveInterval : public LiveRange {
|
||||
public:
|
||||
typedef LiveRange super;
|
||||
using super = LiveRange;
|
||||
|
||||
/// A live range for subregisters. The LaneMask specifies which parts of the
|
||||
/// super register are covered by the interval.
|
||||
/// (@sa TargetRegisterInfo::getSubRegIndexLaneMask()).
|
||||
class SubRange : public LiveRange {
|
||||
public:
|
||||
SubRange *Next;
|
||||
SubRange *Next = nullptr;
|
||||
LaneBitmask LaneMask;
|
||||
|
||||
/// Constructs a new SubRange object.
|
||||
SubRange(LaneBitmask LaneMask)
|
||||
: Next(nullptr), LaneMask(LaneMask) {
|
||||
}
|
||||
SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {}
|
||||
|
||||
/// Constructs a new SubRange object by copying liveness from @p Other.
|
||||
SubRange(LaneBitmask LaneMask, const LiveRange &Other,
|
||||
BumpPtrAllocator &Allocator)
|
||||
: LiveRange(Other, Allocator), Next(nullptr), LaneMask(LaneMask) {
|
||||
}
|
||||
: LiveRange(Other, Allocator), LaneMask(LaneMask) {}
|
||||
|
||||
void print(raw_ostream &OS) const;
|
||||
void dump() const;
|
||||
};
|
||||
|
||||
private:
|
||||
SubRange *SubRanges; ///< Single linked list of subregister live ranges.
|
||||
SubRange *SubRanges = nullptr; ///< Single linked list of subregister live
|
||||
/// ranges.
|
||||
|
||||
public:
|
||||
const unsigned reg; // the register or stack slot of this interval.
|
||||
float weight; // weight of this interval
|
||||
|
||||
LiveInterval(unsigned Reg, float Weight)
|
||||
: SubRanges(nullptr), reg(Reg), weight(Weight) {}
|
||||
LiveInterval(unsigned Reg, float Weight) : reg(Reg), weight(Weight) {}
|
||||
|
||||
~LiveInterval() {
|
||||
clearSubRanges();
|
||||
@ -673,8 +676,10 @@ namespace llvm {
|
||||
template<typename T>
|
||||
class SingleLinkedListIterator {
|
||||
T *P;
|
||||
|
||||
public:
|
||||
SingleLinkedListIterator<T>(T *P) : P(P) {}
|
||||
|
||||
SingleLinkedListIterator<T> &operator++() {
|
||||
P = P->Next;
|
||||
return *this;
|
||||
@ -698,7 +703,9 @@ namespace llvm {
|
||||
}
|
||||
};
|
||||
|
||||
typedef SingleLinkedListIterator<SubRange> subrange_iterator;
|
||||
using subrange_iterator = SingleLinkedListIterator<SubRange>;
|
||||
using const_subrange_iterator = SingleLinkedListIterator<const SubRange>;
|
||||
|
||||
subrange_iterator subrange_begin() {
|
||||
return subrange_iterator(SubRanges);
|
||||
}
|
||||
@ -706,7 +713,6 @@ namespace llvm {
|
||||
return subrange_iterator(nullptr);
|
||||
}
|
||||
|
||||
typedef SingleLinkedListIterator<const SubRange> const_subrange_iterator;
|
||||
const_subrange_iterator subrange_begin() const {
|
||||
return const_subrange_iterator(SubRanges);
|
||||
}
|
||||
@ -759,12 +765,12 @@ namespace llvm {
|
||||
|
||||
/// isSpillable - Can this interval be spilled?
|
||||
bool isSpillable() const {
|
||||
return weight != llvm::huge_valf;
|
||||
return weight != huge_valf;
|
||||
}
|
||||
|
||||
/// markNotSpillable - Mark interval as not spillable
|
||||
void markNotSpillable() {
|
||||
weight = llvm::huge_valf;
|
||||
weight = huge_valf;
|
||||
}
|
||||
|
||||
/// For a given lane mask @p LaneMask, compute indexes at which the
|
||||
@ -931,5 +937,7 @@ namespace llvm {
|
||||
void Distribute(LiveInterval &LI, LiveInterval *LIV[],
|
||||
MachineRegisterInfo &MRI);
|
||||
};
|
||||
}
|
||||
#endif
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
#endif // LLVM_CODEGEN_LIVEINTERVAL_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
|
||||
//===- LiveIntervalAnalysis.h - Live Interval Analysis ----------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -20,6 +20,7 @@
|
||||
#ifndef LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
|
||||
#define LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
|
||||
|
||||
#include "llvm/ADT/ArrayRef.h"
|
||||
#include "llvm/ADT/IndexedMap.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/Analysis/AliasAnalysis.h"
|
||||
@ -27,27 +28,29 @@
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
#include "llvm/CodeGen/SlotIndexes.h"
|
||||
#include "llvm/Support/Allocator.h"
|
||||
#include "llvm/MC/LaneBitmask.h"
|
||||
#include "llvm/Support/CommandLine.h"
|
||||
#include "llvm/Support/Compiler.h"
|
||||
#include "llvm/Support/ErrorHandling.h"
|
||||
#include "llvm/Target/TargetRegisterInfo.h"
|
||||
#include <cmath>
|
||||
#include <cassert>
|
||||
#include <cstdint>
|
||||
#include <utility>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
extern cl::opt<bool> UseSegmentSetForPhysRegs;
|
||||
|
||||
class BitVector;
|
||||
class BlockFrequency;
|
||||
class LiveRangeCalc;
|
||||
class LiveVariables;
|
||||
class MachineDominatorTree;
|
||||
class MachineLoopInfo;
|
||||
class TargetRegisterInfo;
|
||||
class MachineRegisterInfo;
|
||||
class TargetInstrInfo;
|
||||
class TargetRegisterClass;
|
||||
class VirtRegMap;
|
||||
class MachineBlockFrequencyInfo;
|
||||
class BitVector;
|
||||
class LiveRangeCalc;
|
||||
class MachineBlockFrequencyInfo;
|
||||
class MachineDominatorTree;
|
||||
class MachineFunction;
|
||||
class MachineInstr;
|
||||
class MachineRegisterInfo;
|
||||
class raw_ostream;
|
||||
class TargetInstrInfo;
|
||||
class VirtRegMap;
|
||||
|
||||
class LiveIntervals : public MachineFunctionPass {
|
||||
MachineFunction* MF;
|
||||
@ -56,8 +59,8 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
|
||||
const TargetInstrInfo* TII;
|
||||
AliasAnalysis *AA;
|
||||
SlotIndexes* Indexes;
|
||||
MachineDominatorTree *DomTree;
|
||||
LiveRangeCalc *LRCalc;
|
||||
MachineDominatorTree *DomTree = nullptr;
|
||||
LiveRangeCalc *LRCalc = nullptr;
|
||||
|
||||
/// Special pool allocator for VNInfo's (LiveInterval val#).
|
||||
VNInfo::Allocator VNInfoAllocator;
|
||||
@ -95,6 +98,7 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
|
||||
|
||||
public:
|
||||
static char ID;
|
||||
|
||||
LiveIntervals();
|
||||
~LiveIntervals() override;
|
||||
|
||||
@ -466,6 +470,7 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
|
||||
|
||||
class HMEditor;
|
||||
};
|
||||
} // End llvm namespace
|
||||
|
||||
#endif
|
||||
} // end namespace llvm
|
||||
|
||||
#endif // LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
|
||||
|
||||
@ -26,12 +26,14 @@
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class raw_ostream;
|
||||
class TargetRegisterInfo;
|
||||
|
||||
#ifndef NDEBUG
|
||||
// forward declaration
|
||||
template <unsigned Element> class SparseBitVector;
|
||||
typedef SparseBitVector<128> LiveVirtRegBitSet;
|
||||
|
||||
using LiveVirtRegBitSet = SparseBitVector<128>;
|
||||
#endif
|
||||
|
||||
/// Union of live intervals that are strong candidates for coalescing into a
|
||||
@ -42,19 +44,19 @@ class LiveIntervalUnion {
|
||||
// A set of live virtual register segments that supports fast insertion,
|
||||
// intersection, and removal.
|
||||
// Mapping SlotIndex intervals to virtual register numbers.
|
||||
typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
|
||||
using LiveSegments = IntervalMap<SlotIndex, LiveInterval*>;
|
||||
|
||||
public:
|
||||
// SegmentIter can advance to the next segment ordered by starting position
|
||||
// which may belong to a different live virtual register. We also must be able
|
||||
// to reach the current segment's containing virtual register.
|
||||
typedef LiveSegments::iterator SegmentIter;
|
||||
using SegmentIter = LiveSegments::iterator;
|
||||
|
||||
/// Const version of SegmentIter.
|
||||
typedef LiveSegments::const_iterator ConstSegmentIter;
|
||||
using ConstSegmentIter = LiveSegments::const_iterator;
|
||||
|
||||
// LiveIntervalUnions share an external allocator.
|
||||
typedef LiveSegments::Allocator Allocator;
|
||||
using Allocator = LiveSegments::Allocator;
|
||||
|
||||
private:
|
||||
unsigned Tag = 0; // unique tag for current contents.
|
||||
@ -76,7 +78,7 @@ public:
|
||||
SlotIndex startIndex() const { return Segments.start(); }
|
||||
|
||||
// Provide public access to the underlying map to allow overlap iteration.
|
||||
typedef LiveSegments Map;
|
||||
using Map = LiveSegments;
|
||||
const Map &getMap() const { return Segments; }
|
||||
|
||||
/// getTag - Return an opaque tag representing the current state of the union.
|
||||
|
||||
@ -39,6 +39,9 @@
|
||||
namespace llvm {
|
||||
|
||||
class MachineInstr;
|
||||
class MachineOperand;
|
||||
class MachineRegisterInfo;
|
||||
class raw_ostream;
|
||||
|
||||
/// \brief A set of live physical registers with functions to track liveness
|
||||
/// when walking backward/forward through a basic block.
|
||||
@ -46,9 +49,6 @@ class LivePhysRegs {
|
||||
const TargetRegisterInfo *TRI = nullptr;
|
||||
SparseSet<unsigned> LiveRegs;
|
||||
|
||||
LivePhysRegs(const LivePhysRegs&) = delete;
|
||||
LivePhysRegs &operator=(const LivePhysRegs&) = delete;
|
||||
|
||||
public:
|
||||
/// \brief Constructs a new empty LivePhysRegs set.
|
||||
LivePhysRegs() = default;
|
||||
@ -59,6 +59,9 @@ public:
|
||||
LiveRegs.setUniverse(TRI->getNumRegs());
|
||||
}
|
||||
|
||||
LivePhysRegs(const LivePhysRegs&) = delete;
|
||||
LivePhysRegs &operator=(const LivePhysRegs&) = delete;
|
||||
|
||||
/// \brief Clear and initialize the LivePhysRegs set.
|
||||
void init(const TargetRegisterInfo &TRI) {
|
||||
this->TRI = &TRI;
|
||||
@ -134,7 +137,8 @@ public:
|
||||
/// registers.
|
||||
void addLiveOutsNoPristines(const MachineBasicBlock &MBB);
|
||||
|
||||
typedef SparseSet<unsigned>::const_iterator const_iterator;
|
||||
using const_iterator = SparseSet<unsigned>::const_iterator;
|
||||
|
||||
const_iterator begin() const { return LiveRegs.begin(); }
|
||||
const_iterator end() const { return LiveRegs.end(); }
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
|
||||
//===- LiveRangeEdit.h - Basic tools for split and spill --------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -19,19 +19,28 @@
|
||||
#define LLVM_CODEGEN_LIVERANGEEDIT_H
|
||||
|
||||
#include "llvm/ADT/ArrayRef.h"
|
||||
#include "llvm/ADT/None.h"
|
||||
#include "llvm/ADT/SetVector.h"
|
||||
#include "llvm/ADT/SmallPtrSet.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/Analysis/AliasAnalysis.h"
|
||||
#include "llvm/CodeGen/LiveInterval.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||||
#include "llvm/Target/TargetMachine.h"
|
||||
#include "llvm/CodeGen/SlotIndexes.h"
|
||||
#include "llvm/Target/TargetSubtargetInfo.h"
|
||||
#include <cassert>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class LiveIntervals;
|
||||
class MachineBlockFrequencyInfo;
|
||||
class MachineInstr;
|
||||
class MachineLoopInfo;
|
||||
class MachineOperand;
|
||||
class TargetInstrInfo;
|
||||
class TargetRegisterInfo;
|
||||
class VirtRegMap;
|
||||
|
||||
class LiveRangeEdit : private MachineRegisterInfo::Delegate {
|
||||
@ -39,7 +48,10 @@ public:
|
||||
/// Callback methods for LiveRangeEdit owners.
|
||||
class Delegate {
|
||||
virtual void anchor();
|
||||
|
||||
public:
|
||||
virtual ~Delegate() = default;
|
||||
|
||||
/// Called immediately before erasing a dead machine instruction.
|
||||
virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
|
||||
|
||||
@ -53,8 +65,6 @@ public:
|
||||
/// Called after cloning a virtual register.
|
||||
/// This is used for new registers representing connected components of Old.
|
||||
virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
|
||||
|
||||
virtual ~Delegate() {}
|
||||
};
|
||||
|
||||
private:
|
||||
@ -70,7 +80,7 @@ private:
|
||||
const unsigned FirstNew;
|
||||
|
||||
/// ScannedRemattable - true when remattable values have been identified.
|
||||
bool ScannedRemattable;
|
||||
bool ScannedRemattable = false;
|
||||
|
||||
/// DeadRemats - The saved instructions which have already been dead after
|
||||
/// rematerialization but not deleted yet -- to be done in postOptimization.
|
||||
@ -78,11 +88,11 @@ private:
|
||||
|
||||
/// Remattable - Values defined by remattable instructions as identified by
|
||||
/// tii.isTriviallyReMaterializable().
|
||||
SmallPtrSet<const VNInfo*,4> Remattable;
|
||||
SmallPtrSet<const VNInfo *, 4> Remattable;
|
||||
|
||||
/// Rematted - Values that were actually rematted, and so need to have their
|
||||
/// live range trimmed or entirely removed.
|
||||
SmallPtrSet<const VNInfo*,4> Rematted;
|
||||
SmallPtrSet<const VNInfo *, 4> Rematted;
|
||||
|
||||
/// scanRemattable - Identify the Parent values that may rematerialize.
|
||||
void scanRemattable(AliasAnalysis *aa);
|
||||
@ -94,11 +104,11 @@ private:
|
||||
|
||||
/// foldAsLoad - If LI has a single use and a single def that can be folded as
|
||||
/// a load, eliminate the register by folding the def into the use.
|
||||
bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
|
||||
bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr *> &Dead);
|
||||
|
||||
using ToShrinkSet = SetVector<LiveInterval *, SmallVector<LiveInterval *, 8>,
|
||||
SmallPtrSet<LiveInterval *, 8>>;
|
||||
|
||||
typedef SetVector<LiveInterval*,
|
||||
SmallVector<LiveInterval*, 8>,
|
||||
SmallPtrSet<LiveInterval*, 8> > ToShrinkSet;
|
||||
/// Helper for eliminateDeadDefs.
|
||||
void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
|
||||
AliasAnalysis *AA);
|
||||
@ -129,26 +139,26 @@ public:
|
||||
SmallPtrSet<MachineInstr *, 32> *deadRemats = nullptr)
|
||||
: Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
|
||||
VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
|
||||
FirstNew(newRegs.size()), ScannedRemattable(false),
|
||||
DeadRemats(deadRemats) {
|
||||
FirstNew(newRegs.size()), DeadRemats(deadRemats) {
|
||||
MRI.setDelegate(this);
|
||||
}
|
||||
|
||||
~LiveRangeEdit() override { MRI.resetDelegate(this); }
|
||||
|
||||
LiveInterval &getParent() const {
|
||||
assert(Parent && "No parent LiveInterval");
|
||||
return *Parent;
|
||||
assert(Parent && "No parent LiveInterval");
|
||||
return *Parent;
|
||||
}
|
||||
|
||||
unsigned getReg() const { return getParent().reg; }
|
||||
|
||||
/// Iterator for accessing the new registers added by this edit.
|
||||
typedef SmallVectorImpl<unsigned>::const_iterator iterator;
|
||||
iterator begin() const { return NewRegs.begin()+FirstNew; }
|
||||
using iterator = SmallVectorImpl<unsigned>::const_iterator;
|
||||
iterator begin() const { return NewRegs.begin() + FirstNew; }
|
||||
iterator end() const { return NewRegs.end(); }
|
||||
unsigned size() const { return NewRegs.size()-FirstNew; }
|
||||
unsigned size() const { return NewRegs.size() - FirstNew; }
|
||||
bool empty() const { return size() == 0; }
|
||||
unsigned get(unsigned idx) const { return NewRegs[idx+FirstNew]; }
|
||||
unsigned get(unsigned idx) const { return NewRegs[idx + FirstNew]; }
|
||||
|
||||
/// pop_back - It allows LiveRangeEdit users to drop new registers.
|
||||
/// The context is when an original def instruction of a register is
|
||||
@ -176,26 +186,25 @@ public:
|
||||
return createEmptyIntervalFrom(getReg());
|
||||
}
|
||||
|
||||
unsigned create() {
|
||||
return createFrom(getReg());
|
||||
}
|
||||
unsigned create() { return createFrom(getReg()); }
|
||||
|
||||
/// anyRematerializable - Return true if any parent values may be
|
||||
/// rematerializable.
|
||||
/// This function must be called before any rematerialization is attempted.
|
||||
bool anyRematerializable(AliasAnalysis*);
|
||||
bool anyRematerializable(AliasAnalysis *);
|
||||
|
||||
/// checkRematerializable - Manually add VNI to the list of rematerializable
|
||||
/// values if DefMI may be rematerializable.
|
||||
bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
|
||||
AliasAnalysis*);
|
||||
AliasAnalysis *);
|
||||
|
||||
/// Remat - Information needed to rematerialize at a specific location.
|
||||
struct Remat {
|
||||
VNInfo *ParentVNI; // parent_'s value at the remat location.
|
||||
MachineInstr *OrigMI; // Instruction defining OrigVNI. It contains the
|
||||
// real expr for remat.
|
||||
explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(nullptr) {}
|
||||
VNInfo *ParentVNI; // parent_'s value at the remat location.
|
||||
MachineInstr *OrigMI = nullptr; // Instruction defining OrigVNI. It contains
|
||||
// the real expr for remat.
|
||||
|
||||
explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI) {}
|
||||
};
|
||||
|
||||
/// canRematerializeAt - Determine if ParentVNI can be rematerialized at
|
||||
@ -209,10 +218,8 @@ public:
|
||||
/// liveness is not updated.
|
||||
/// Return the SlotIndex of the new instruction.
|
||||
SlotIndex rematerializeAt(MachineBasicBlock &MBB,
|
||||
MachineBasicBlock::iterator MI,
|
||||
unsigned DestReg,
|
||||
const Remat &RM,
|
||||
const TargetRegisterInfo&,
|
||||
MachineBasicBlock::iterator MI, unsigned DestReg,
|
||||
const Remat &RM, const TargetRegisterInfo &,
|
||||
bool Late = false);
|
||||
|
||||
/// markRematerialized - explicitly mark a value as rematerialized after doing
|
||||
@ -248,11 +255,10 @@ public:
|
||||
|
||||
/// calculateRegClassAndHint - Recompute register class and hint for each new
|
||||
/// register.
|
||||
void calculateRegClassAndHint(MachineFunction&,
|
||||
const MachineLoopInfo&,
|
||||
const MachineBlockFrequencyInfo&);
|
||||
void calculateRegClassAndHint(MachineFunction &, const MachineLoopInfo &,
|
||||
const MachineBlockFrequencyInfo &);
|
||||
};
|
||||
|
||||
}
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
||||
#endif // LLVM_CODEGEN_LIVERANGEEDIT_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===//
|
||||
//===- LiveStackAnalysis.h - Live Stack Slot Analysis -----------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -18,13 +18,16 @@
|
||||
|
||||
#include "llvm/CodeGen/LiveInterval.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
#include "llvm/Support/Allocator.h"
|
||||
#include "llvm/Target/TargetRegisterInfo.h"
|
||||
#include "llvm/Pass.h"
|
||||
#include <cassert>
|
||||
#include <map>
|
||||
#include <unordered_map>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class TargetRegisterClass;
|
||||
class TargetRegisterInfo;
|
||||
|
||||
class LiveStacks : public MachineFunctionPass {
|
||||
const TargetRegisterInfo *TRI;
|
||||
|
||||
@ -33,8 +36,7 @@ class LiveStacks : public MachineFunctionPass {
|
||||
VNInfo::Allocator VNInfoAllocator;
|
||||
|
||||
/// S2IMap - Stack slot indices to live interval mapping.
|
||||
///
|
||||
typedef std::unordered_map<int, LiveInterval> SS2IntervalMap;
|
||||
using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
|
||||
SS2IntervalMap S2IMap;
|
||||
|
||||
/// S2RCMap - Stack slot indices to register class mapping.
|
||||
@ -42,12 +44,14 @@ class LiveStacks : public MachineFunctionPass {
|
||||
|
||||
public:
|
||||
static char ID; // Pass identification, replacement for typeid
|
||||
|
||||
LiveStacks() : MachineFunctionPass(ID) {
|
||||
initializeLiveStacksPass(*PassRegistry::getPassRegistry());
|
||||
}
|
||||
|
||||
typedef SS2IntervalMap::iterator iterator;
|
||||
typedef SS2IntervalMap::const_iterator const_iterator;
|
||||
using iterator = SS2IntervalMap::iterator;
|
||||
using const_iterator = SS2IntervalMap::const_iterator;
|
||||
|
||||
const_iterator begin() const { return S2IMap.begin(); }
|
||||
const_iterator end() const { return S2IMap.end(); }
|
||||
iterator begin() { return S2IMap.begin(); }
|
||||
@ -93,6 +97,7 @@ public:
|
||||
/// print - Implement the dump method.
|
||||
void print(raw_ostream &O, const Module * = nullptr) const override;
|
||||
};
|
||||
}
|
||||
|
||||
#endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */
|
||||
} // end namespace llvm
|
||||
|
||||
#endif // LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===-- llvm/CodeGen/MachineBasicBlock.h ------------------------*- C++ -*-===//
|
||||
//===- llvm/CodeGen/MachineBasicBlock.h -------------------------*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -15,41 +15,50 @@
|
||||
#define LLVM_CODEGEN_MACHINEBASICBLOCK_H
|
||||
|
||||
#include "llvm/ADT/GraphTraits.h"
|
||||
#include "llvm/ADT/ilist.h"
|
||||
#include "llvm/ADT/ilist_node.h"
|
||||
#include "llvm/ADT/iterator_range.h"
|
||||
#include "llvm/ADT/simple_ilist.h"
|
||||
#include "llvm/CodeGen/MachineInstrBundleIterator.h"
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/IR/DebugLoc.h"
|
||||
#include "llvm/Support/BranchProbability.h"
|
||||
#include "llvm/MC/LaneBitmask.h"
|
||||
#include "llvm/MC/MCRegisterInfo.h"
|
||||
#include "llvm/Support/DataTypes.h"
|
||||
#include <cassert>
|
||||
#include <cstdint>
|
||||
#include <functional>
|
||||
#include <iterator>
|
||||
#include <string>
|
||||
#include <vector>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class Pass;
|
||||
class BasicBlock;
|
||||
class MachineFunction;
|
||||
class MCSymbol;
|
||||
class MIPrinter;
|
||||
class ModuleSlotTracker;
|
||||
class Pass;
|
||||
class SlotIndexes;
|
||||
class StringRef;
|
||||
class raw_ostream;
|
||||
class MachineBranchProbabilityInfo;
|
||||
class TargetRegisterClass;
|
||||
class TargetRegisterInfo;
|
||||
|
||||
template <> struct ilist_traits<MachineInstr> {
|
||||
private:
|
||||
friend class MachineBasicBlock; // Set by the owning MachineBasicBlock.
|
||||
|
||||
MachineBasicBlock *Parent;
|
||||
|
||||
typedef simple_ilist<MachineInstr, ilist_sentinel_tracking<true>>::iterator
|
||||
instr_iterator;
|
||||
using instr_iterator =
|
||||
simple_ilist<MachineInstr, ilist_sentinel_tracking<true>>::iterator;
|
||||
|
||||
public:
|
||||
void addNodeToList(MachineInstr *N);
|
||||
void removeNodeFromList(MachineInstr *N);
|
||||
void transferNodesFromList(ilist_traits &OldList, instr_iterator First,
|
||||
instr_iterator Last);
|
||||
|
||||
void deleteNode(MachineInstr *MI);
|
||||
};
|
||||
|
||||
@ -69,7 +78,8 @@ public:
|
||||
};
|
||||
|
||||
private:
|
||||
typedef ilist<MachineInstr, ilist_sentinel_tracking<true>> Instructions;
|
||||
using Instructions = ilist<MachineInstr, ilist_sentinel_tracking<true>>;
|
||||
|
||||
Instructions Insts;
|
||||
const BasicBlock *BB;
|
||||
int Number;
|
||||
@ -83,12 +93,12 @@ private:
|
||||
/// same order as Successors, or it is empty if we don't use it (disable
|
||||
/// optimization).
|
||||
std::vector<BranchProbability> Probs;
|
||||
typedef std::vector<BranchProbability>::iterator probability_iterator;
|
||||
typedef std::vector<BranchProbability>::const_iterator
|
||||
const_probability_iterator;
|
||||
using probability_iterator = std::vector<BranchProbability>::iterator;
|
||||
using const_probability_iterator =
|
||||
std::vector<BranchProbability>::const_iterator;
|
||||
|
||||
/// Keep track of the physical registers that are livein of the basicblock.
|
||||
typedef std::vector<RegisterMaskPair> LiveInVector;
|
||||
using LiveInVector = std::vector<RegisterMaskPair>;
|
||||
LiveInVector LiveIns;
|
||||
|
||||
/// Alignment of the basic block. Zero if the basic block does not need to be
|
||||
@ -113,7 +123,7 @@ private:
|
||||
mutable MCSymbol *CachedMCSymbol = nullptr;
|
||||
|
||||
// Intrusive list support
|
||||
MachineBasicBlock() {}
|
||||
MachineBasicBlock() = default;
|
||||
|
||||
explicit MachineBasicBlock(MachineFunction &MF, const BasicBlock *BB);
|
||||
|
||||
@ -145,16 +155,16 @@ public:
|
||||
const MachineFunction *getParent() const { return xParent; }
|
||||
MachineFunction *getParent() { return xParent; }
|
||||
|
||||
typedef Instructions::iterator instr_iterator;
|
||||
typedef Instructions::const_iterator const_instr_iterator;
|
||||
typedef Instructions::reverse_iterator reverse_instr_iterator;
|
||||
typedef Instructions::const_reverse_iterator const_reverse_instr_iterator;
|
||||
using instr_iterator = Instructions::iterator;
|
||||
using const_instr_iterator = Instructions::const_iterator;
|
||||
using reverse_instr_iterator = Instructions::reverse_iterator;
|
||||
using const_reverse_instr_iterator = Instructions::const_reverse_iterator;
|
||||
|
||||
typedef MachineInstrBundleIterator<MachineInstr> iterator;
|
||||
typedef MachineInstrBundleIterator<const MachineInstr> const_iterator;
|
||||
typedef MachineInstrBundleIterator<MachineInstr, true> reverse_iterator;
|
||||
typedef MachineInstrBundleIterator<const MachineInstr, true>
|
||||
const_reverse_iterator;
|
||||
using iterator = MachineInstrBundleIterator<MachineInstr>;
|
||||
using const_iterator = MachineInstrBundleIterator<const MachineInstr>;
|
||||
using reverse_iterator = MachineInstrBundleIterator<MachineInstr, true>;
|
||||
using const_reverse_iterator =
|
||||
MachineInstrBundleIterator<const MachineInstr, true>;
|
||||
|
||||
unsigned size() const { return (unsigned)Insts.size(); }
|
||||
bool empty() const { return Insts.empty(); }
|
||||
@ -178,8 +188,8 @@ public:
|
||||
reverse_instr_iterator instr_rend () { return Insts.rend(); }
|
||||
const_reverse_instr_iterator instr_rend () const { return Insts.rend(); }
|
||||
|
||||
typedef iterator_range<instr_iterator> instr_range;
|
||||
typedef iterator_range<const_instr_iterator> const_instr_range;
|
||||
using instr_range = iterator_range<instr_iterator>;
|
||||
using const_instr_range = iterator_range<const_instr_iterator>;
|
||||
instr_range instrs() { return instr_range(instr_begin(), instr_end()); }
|
||||
const_instr_range instrs() const {
|
||||
return const_instr_range(instr_begin(), instr_end());
|
||||
@ -213,18 +223,18 @@ public:
|
||||
}
|
||||
|
||||
// Machine-CFG iterators
|
||||
typedef std::vector<MachineBasicBlock *>::iterator pred_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::const_iterator const_pred_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::iterator succ_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::const_iterator const_succ_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::reverse_iterator
|
||||
pred_reverse_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::const_reverse_iterator
|
||||
const_pred_reverse_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::reverse_iterator
|
||||
succ_reverse_iterator;
|
||||
typedef std::vector<MachineBasicBlock *>::const_reverse_iterator
|
||||
const_succ_reverse_iterator;
|
||||
using pred_iterator = std::vector<MachineBasicBlock *>::iterator;
|
||||
using const_pred_iterator = std::vector<MachineBasicBlock *>::const_iterator;
|
||||
using succ_iterator = std::vector<MachineBasicBlock *>::iterator;
|
||||
using const_succ_iterator = std::vector<MachineBasicBlock *>::const_iterator;
|
||||
using pred_reverse_iterator =
|
||||
std::vector<MachineBasicBlock *>::reverse_iterator;
|
||||
using const_pred_reverse_iterator =
|
||||
std::vector<MachineBasicBlock *>::const_reverse_iterator;
|
||||
using succ_reverse_iterator =
|
||||
std::vector<MachineBasicBlock *>::reverse_iterator;
|
||||
using const_succ_reverse_iterator =
|
||||
std::vector<MachineBasicBlock *>::const_reverse_iterator;
|
||||
pred_iterator pred_begin() { return Predecessors.begin(); }
|
||||
const_pred_iterator pred_begin() const { return Predecessors.begin(); }
|
||||
pred_iterator pred_end() { return Predecessors.end(); }
|
||||
@ -307,7 +317,7 @@ public:
|
||||
|
||||
// Iteration support for live in sets. These sets are kept in sorted
|
||||
// order by their register number.
|
||||
typedef LiveInVector::const_iterator livein_iterator;
|
||||
using livein_iterator = LiveInVector::const_iterator;
|
||||
#ifndef NDEBUG
|
||||
/// Unlike livein_begin, this method does not check that the liveness
|
||||
/// information is accurate. Still for debug purposes it may be useful
|
||||
@ -455,7 +465,6 @@ public:
|
||||
/// other block.
|
||||
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const;
|
||||
|
||||
|
||||
/// Return the fallthrough block if the block can implicitly
|
||||
/// transfer control to the block after it by falling off the end of
|
||||
/// it. This should return null if it can reach the block after
|
||||
@ -695,7 +704,7 @@ public:
|
||||
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
|
||||
unsigned Reg,
|
||||
const_iterator Before,
|
||||
unsigned Neighborhood=10) const;
|
||||
unsigned Neighborhood = 10) const;
|
||||
|
||||
// Debugging methods.
|
||||
void dump() const;
|
||||
@ -714,7 +723,6 @@ public:
|
||||
/// Return the MCSymbol for this basic block.
|
||||
MCSymbol *getSymbol() const;
|
||||
|
||||
|
||||
private:
|
||||
/// Return probability iterator corresponding to the I successor iterator.
|
||||
probability_iterator getProbabilityIterator(succ_iterator I);
|
||||
@ -764,8 +772,8 @@ struct MBB2NumberFunctor :
|
||||
//
|
||||
|
||||
template <> struct GraphTraits<MachineBasicBlock *> {
|
||||
typedef MachineBasicBlock *NodeRef;
|
||||
typedef MachineBasicBlock::succ_iterator ChildIteratorType;
|
||||
using NodeRef = MachineBasicBlock *;
|
||||
using ChildIteratorType = MachineBasicBlock::succ_iterator;
|
||||
|
||||
static NodeRef getEntryNode(MachineBasicBlock *BB) { return BB; }
|
||||
static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
|
||||
@ -773,8 +781,8 @@ template <> struct GraphTraits<MachineBasicBlock *> {
|
||||
};
|
||||
|
||||
template <> struct GraphTraits<const MachineBasicBlock *> {
|
||||
typedef const MachineBasicBlock *NodeRef;
|
||||
typedef MachineBasicBlock::const_succ_iterator ChildIteratorType;
|
||||
using NodeRef = const MachineBasicBlock *;
|
||||
using ChildIteratorType = MachineBasicBlock::const_succ_iterator;
|
||||
|
||||
static NodeRef getEntryNode(const MachineBasicBlock *BB) { return BB; }
|
||||
static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
|
||||
@ -787,28 +795,30 @@ template <> struct GraphTraits<const MachineBasicBlock *> {
|
||||
// to be when traversing the predecessor edges of a MBB
|
||||
// instead of the successor edges.
|
||||
//
|
||||
template <> struct GraphTraits<Inverse<MachineBasicBlock*> > {
|
||||
typedef MachineBasicBlock *NodeRef;
|
||||
typedef MachineBasicBlock::pred_iterator ChildIteratorType;
|
||||
template <> struct GraphTraits<Inverse<MachineBasicBlock*>> {
|
||||
using NodeRef = MachineBasicBlock *;
|
||||
using ChildIteratorType = MachineBasicBlock::pred_iterator;
|
||||
|
||||
static NodeRef getEntryNode(Inverse<MachineBasicBlock *> G) {
|
||||
return G.Graph;
|
||||
}
|
||||
|
||||
static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
|
||||
static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
|
||||
};
|
||||
|
||||
template <> struct GraphTraits<Inverse<const MachineBasicBlock*> > {
|
||||
typedef const MachineBasicBlock *NodeRef;
|
||||
typedef MachineBasicBlock::const_pred_iterator ChildIteratorType;
|
||||
template <> struct GraphTraits<Inverse<const MachineBasicBlock*>> {
|
||||
using NodeRef = const MachineBasicBlock *;
|
||||
using ChildIteratorType = MachineBasicBlock::const_pred_iterator;
|
||||
|
||||
static NodeRef getEntryNode(Inverse<const MachineBasicBlock *> G) {
|
||||
return G.Graph;
|
||||
}
|
||||
|
||||
static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
|
||||
static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
|
||||
};
|
||||
|
||||
|
||||
|
||||
/// MachineInstrSpan provides an interface to get an iteration range
|
||||
/// containing the instruction it was initialized with, along with all
|
||||
/// those instructions inserted prior to or following that instruction
|
||||
@ -816,6 +826,7 @@ template <> struct GraphTraits<Inverse<const MachineBasicBlock*> > {
|
||||
class MachineInstrSpan {
|
||||
MachineBasicBlock &MBB;
|
||||
MachineBasicBlock::iterator I, B, E;
|
||||
|
||||
public:
|
||||
MachineInstrSpan(MachineBasicBlock::iterator I)
|
||||
: MBB(*I->getParent()),
|
||||
@ -854,6 +865,6 @@ inline IterT skipDebugInstructionsBackward(IterT It, IterT Begin) {
|
||||
return It;
|
||||
}
|
||||
|
||||
} // End llvm namespace
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
||||
#endif // LLVM_CODEGEN_MACHINEBASICBLOCK_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -*- C++ -*-----===//
|
||||
//===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -----*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -17,26 +17,28 @@
|
||||
#include "llvm/ADT/Optional.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
#include "llvm/Support/BlockFrequency.h"
|
||||
#include <climits>
|
||||
#include <cstdint>
|
||||
#include <memory>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
template <class BlockT> class BlockFrequencyInfoImpl;
|
||||
class MachineBasicBlock;
|
||||
class MachineBranchProbabilityInfo;
|
||||
class MachineFunction;
|
||||
class MachineLoopInfo;
|
||||
template <class BlockT> class BlockFrequencyInfoImpl;
|
||||
class raw_ostream;
|
||||
|
||||
/// MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation
|
||||
/// to estimate machine basic block frequencies.
|
||||
class MachineBlockFrequencyInfo : public MachineFunctionPass {
|
||||
typedef BlockFrequencyInfoImpl<MachineBasicBlock> ImplType;
|
||||
using ImplType = BlockFrequencyInfoImpl<MachineBasicBlock>;
|
||||
std::unique_ptr<ImplType> MBFI;
|
||||
|
||||
public:
|
||||
static char ID;
|
||||
|
||||
MachineBlockFrequencyInfo();
|
||||
|
||||
~MachineBlockFrequencyInfo() override;
|
||||
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override;
|
||||
@ -74,9 +76,8 @@ public:
|
||||
const MachineBasicBlock *MBB) const;
|
||||
|
||||
uint64_t getEntryFreq() const;
|
||||
|
||||
};
|
||||
|
||||
}
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
||||
#endif // LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
|
||||
|
||||
@ -11,23 +11,28 @@
|
||||
#define LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
|
||||
|
||||
#include "llvm/Analysis/DominanceFrontier.h"
|
||||
#include "llvm/Analysis/DominanceFrontierImpl.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
|
||||
#include "llvm/Support/GenericDomTree.h"
|
||||
#include <vector>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class MachineDominanceFrontier : public MachineFunctionPass {
|
||||
ForwardDominanceFrontierBase<MachineBasicBlock> Base;
|
||||
public:
|
||||
typedef DominatorTreeBase<MachineBasicBlock> DomTreeT;
|
||||
typedef DomTreeNodeBase<MachineBasicBlock> DomTreeNodeT;
|
||||
typedef DominanceFrontierBase<MachineBasicBlock>::DomSetType DomSetType;
|
||||
typedef DominanceFrontierBase<MachineBasicBlock>::iterator iterator;
|
||||
typedef DominanceFrontierBase<MachineBasicBlock>::const_iterator const_iterator;
|
||||
|
||||
void operator=(const MachineDominanceFrontier &) = delete;
|
||||
public:
|
||||
using DomTreeT = DominatorTreeBase<MachineBasicBlock>;
|
||||
using DomTreeNodeT = DomTreeNodeBase<MachineBasicBlock>;
|
||||
using DomSetType = DominanceFrontierBase<MachineBasicBlock>::DomSetType;
|
||||
using iterator = DominanceFrontierBase<MachineBasicBlock>::iterator;
|
||||
using const_iterator =
|
||||
DominanceFrontierBase<MachineBasicBlock>::const_iterator;
|
||||
|
||||
MachineDominanceFrontier(const MachineDominanceFrontier &) = delete;
|
||||
MachineDominanceFrontier &
|
||||
operator=(const MachineDominanceFrontier &) = delete;
|
||||
|
||||
static char ID;
|
||||
|
||||
@ -104,6 +109,6 @@ public:
|
||||
void getAnalysisUsage(AnalysisUsage &AU) const override;
|
||||
};
|
||||
|
||||
}
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
||||
#endif // LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//=- llvm/CodeGen/MachineDominators.h - Machine Dom Calculation --*- C++ -*-==//
|
||||
//==- llvm/CodeGen/MachineDominators.h - Machine Dom Calculation -*- C++ -*-==//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -16,12 +16,15 @@
|
||||
#define LLVM_CODEGEN_MACHINEDOMINATORS_H
|
||||
|
||||
#include "llvm/ADT/SmallSet.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/Support/GenericDomTree.h"
|
||||
#include "llvm/Support/GenericDomTreeConstruction.h"
|
||||
#include <cassert>
|
||||
#include <memory>
|
||||
#include <vector>
|
||||
|
||||
namespace llvm {
|
||||
|
||||
@ -33,7 +36,7 @@ inline void DominatorTreeBase<MachineBasicBlock>::addRoot(MachineBasicBlock* MBB
|
||||
extern template class DomTreeNodeBase<MachineBasicBlock>;
|
||||
extern template class DominatorTreeBase<MachineBasicBlock>;
|
||||
|
||||
typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
|
||||
using MachineDomTreeNode = DomTreeNodeBase<MachineBasicBlock>;
|
||||
|
||||
//===-------------------------------------
|
||||
/// DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to
|
||||
@ -52,6 +55,7 @@ class MachineDominatorTree : public MachineFunctionPass {
|
||||
/// The splitting of a critical edge is local and thus, it is possible
|
||||
/// to apply several of those changes at the same time.
|
||||
mutable SmallVector<CriticalEdge, 32> CriticalEdgesToSplit;
|
||||
|
||||
/// \brief Remember all the basic blocks that are inserted during
|
||||
/// edge splitting.
|
||||
/// Invariant: NewBBs == all the basic blocks contained in the NewBB
|
||||
@ -259,8 +263,8 @@ public:
|
||||
|
||||
template <class Node, class ChildIterator>
|
||||
struct MachineDomTreeGraphTraitsBase {
|
||||
typedef Node *NodeRef;
|
||||
typedef ChildIterator ChildIteratorType;
|
||||
using NodeRef = Node *;
|
||||
using ChildIteratorType = ChildIterator;
|
||||
|
||||
static NodeRef getEntryNode(NodeRef N) { return N; }
|
||||
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
|
||||
@ -287,6 +291,6 @@ template <> struct GraphTraits<MachineDominatorTree*>
|
||||
}
|
||||
};
|
||||
|
||||
}
|
||||
} // end namespace llvm
|
||||
|
||||
#endif
|
||||
#endif // LLVM_CODEGEN_MACHINEDOMINATORS_H
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
//===-- LiveIntervalAnalysis.cpp - Live Interval Analysis -----------------===//
|
||||
//===- LiveIntervalAnalysis.cpp - Live Interval Analysis ------------------===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
@ -14,28 +14,45 @@
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
|
||||
#include "LiveRangeCalc.h"
|
||||
#include "llvm/ADT/STLExtras.h"
|
||||
#include "llvm/ADT/ArrayRef.h"
|
||||
#include "llvm/ADT/DepthFirstIterator.h"
|
||||
#include "llvm/ADT/iterator_range.h"
|
||||
#include "llvm/ADT/SmallPtrSet.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/Analysis/AliasAnalysis.h"
|
||||
#include "llvm/CodeGen/LiveInterval.h"
|
||||
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
|
||||
#include "llvm/CodeGen/LiveVariables.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
|
||||
#include "llvm/CodeGen/MachineDominators.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/CodeGen/MachineInstr.h"
|
||||
#include "llvm/CodeGen/MachineInstrBundle.h"
|
||||
#include "llvm/CodeGen/MachineOperand.h"
|
||||
#include "llvm/CodeGen/MachineRegisterInfo.h"
|
||||
#include "llvm/CodeGen/Passes.h"
|
||||
#include "llvm/CodeGen/SlotIndexes.h"
|
||||
#include "llvm/CodeGen/VirtRegMap.h"
|
||||
#include "llvm/IR/Value.h"
|
||||
#include "llvm/MC/LaneBitmask.h"
|
||||
#include "llvm/MC/MCRegisterInfo.h"
|
||||
#include "llvm/Pass.h"
|
||||
#include "llvm/Support/BlockFrequency.h"
|
||||
#include "llvm/Support/CommandLine.h"
|
||||
#include "llvm/Support/Compiler.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
#include "llvm/Support/ErrorHandling.h"
|
||||
#include "llvm/Support/MathExtras.h"
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
#include "llvm/Target/TargetInstrInfo.h"
|
||||
#include "llvm/Target/TargetRegisterInfo.h"
|
||||
#include "llvm/Target/TargetSubtargetInfo.h"
|
||||
#include <algorithm>
|
||||
#include <cmath>
|
||||
#include <cassert>
|
||||
#include <cstdint>
|
||||
#include <iterator>
|
||||
#include <tuple>
|
||||
#include <utility>
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "regalloc"
|
||||
@ -59,11 +76,13 @@ static bool EnablePrecomputePhysRegs = false;
|
||||
#endif // NDEBUG
|
||||
|
||||
namespace llvm {
|
||||
|
||||
cl::opt<bool> UseSegmentSetForPhysRegs(
|
||||
"use-segment-set-for-physregs", cl::Hidden, cl::init(true),
|
||||
cl::desc(
|
||||
"Use segment set for the computation of the live ranges of physregs."));
|
||||
}
|
||||
|
||||
} // end namespace llvm
|
||||
|
||||
void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
AU.setPreservesCFG();
|
||||
@ -78,8 +97,7 @@ void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
|
||||
MachineFunctionPass::getAnalysisUsage(AU);
|
||||
}
|
||||
|
||||
LiveIntervals::LiveIntervals() : MachineFunctionPass(ID),
|
||||
DomTree(nullptr), LRCalc(nullptr) {
|
||||
LiveIntervals::LiveIntervals() : MachineFunctionPass(ID) {
|
||||
initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
|
||||
}
|
||||
|
||||
@ -168,12 +186,10 @@ LLVM_DUMP_METHOD void LiveIntervals::dumpInstrs() const {
|
||||
#endif
|
||||
|
||||
LiveInterval* LiveIntervals::createInterval(unsigned reg) {
|
||||
float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ?
|
||||
llvm::huge_valf : 0.0F;
|
||||
float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ? huge_valf : 0.0F;
|
||||
return new LiveInterval(reg, Weight);
|
||||
}
|
||||
|
||||
|
||||
/// Compute the live interval of a virtual register, based on defs and uses.
|
||||
void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
|
||||
assert(LRCalc && "LRCalc not initialized.");
|
||||
@ -337,7 +353,7 @@ static void createSegmentsForValues(LiveRange &LR,
|
||||
}
|
||||
}
|
||||
|
||||
typedef SmallVector<std::pair<SlotIndex, VNInfo*>, 16> ShrinkToUsesWorkList;
|
||||
using ShrinkToUsesWorkList = SmallVector<std::pair<SlotIndex, VNInfo*>, 16>;
|
||||
|
||||
static void extendSegmentsToUses(LiveRange &LR, const SlotIndexes &Indexes,
|
||||
ShrinkToUsesWorkList &WorkList,
|
||||
@ -593,7 +609,7 @@ void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
|
||||
// Find all blocks that are reachable from KillMBB without leaving VNI's live
|
||||
// range. It is possible that KillMBB itself is reachable, so start a DFS
|
||||
// from each successor.
|
||||
typedef df_iterator_default_set<MachineBasicBlock*,9> VisitedTy;
|
||||
using VisitedTy = df_iterator_default_set<MachineBasicBlock*,9>;
|
||||
VisitedTy Visited;
|
||||
for (MachineBasicBlock *Succ : KillMBB->successors()) {
|
||||
for (df_ext_iterator<MachineBasicBlock*, VisitedTy>
|
||||
@ -822,7 +838,6 @@ LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr &startInst) {
|
||||
return S;
|
||||
}
|
||||
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
// Register mask functions
|
||||
//===----------------------------------------------------------------------===//
|
||||
@ -855,7 +870,7 @@ bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
|
||||
return false;
|
||||
|
||||
bool Found = false;
|
||||
for (;;) {
|
||||
while (true) {
|
||||
assert(*SlotI >= LiveI->start);
|
||||
// Loop over all slots overlapping this segment.
|
||||
while (*SlotI < LiveI->end) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user