[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).

llvm-svn: 303820

include/llvm/CodeGen/AsmPrinter.h

@@ -34,6 +34,7 @@
 namespace llvm {
 
 class AsmPrinterHandler;
+class BasicBlock;
 class BlockAddress;
 class Constant;
 class ConstantArray;
@@ -43,6 +44,7 @@ class DIEAbbrev;
 class DwarfDebug;
 class GCMetadataPrinter;
 class GlobalIndirectSymbol;
+class GlobalObject;
 class GlobalValue;
 class GlobalVariable;
 class GCStrategy;
@@ -65,6 +67,8 @@ class MCSubtargetInfo;
 class MCSymbol;
 class MCTargetOptions;
 class MDNode;
+class Module;
+class raw_ostream;
 class TargetLoweringObjectFile;
 class TargetMachine;
 
@@ -109,7 +113,7 @@ public:
 
   /// Map global GOT equivalent MCSymbols to GlobalVariables and keep track of
   /// its number of uses by other globals.
-  typedef std::pair<const GlobalVariable *, unsigned> GOTEquivUsePair;
+  using GOTEquivUsePair = std::pair<const GlobalVariable *, unsigned>;
   MapVector<const MCSymbol *, GOTEquivUsePair> GlobalGOTEquivs;
 
   /// Enable print [latency:throughput] in output

include/llvm/CodeGen/AtomicExpandUtils.h

@@ -1,4 +1,4 @@
-//===-- AtomicExpandUtils.h - Utilities for expanding atomic instructions -===//
+//===- AtomicExpandUtils.h - Utilities for expanding atomic instructions --===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,19 +7,24 @@
 //
 //===----------------------------------------------------------------------===//
 
+#ifndef LLVM_CODEGEN_ATOMICEXPANDUTILS_H
+#define LLVM_CODEGEN_ATOMICEXPANDUTILS_H
+
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/IR/IRBuilder.h"
+#include "llvm/Support/AtomicOrdering.h"
 
 namespace llvm {
-class Value;
-class AtomicRMWInst;
 
+class AtomicRMWInst;
+class Value;
 
 /// Parameters (see the expansion example below):
 /// (the builder, %addr, %loaded, %new_val, ordering,
 ///  /* OUT */ %success, /* OUT */ %new_loaded)
-typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
+using CreateCmpXchgInstFun =
-                          AtomicOrdering, Value *&, Value *&)> CreateCmpXchgInstFun;
+    function_ref<void(IRBuilder<> &, Value *, Value *, Value *, AtomicOrdering,
+                      Value *&, Value *&)>;
 
 /// \brief Expand an atomic RMW instruction into a loop utilizing
 /// cmpxchg. You'll want to make sure your target machine likes cmpxchg
@@ -42,7 +47,8 @@ typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
 /// loop:
 ///     %loaded = phi iN [ %init_loaded, %entry ], [ %new_loaded, %loop ]
 ///     %new = some_op iN %loaded, %incr
-/// ; This is what -atomic-expand will produce using this function on i686 targets:
+/// ; This is what -atomic-expand will produce using this function on i686
+/// targets:
 ///     %pair = cmpxchg iN* %addr, iN %loaded, iN %new_val
 ///     %new_loaded = extractvalue { iN, i1 } %pair, 0
 ///     %success = extractvalue { iN, i1 } %pair, 1
@@ -52,6 +58,8 @@ typedef function_ref<void(IRBuilder<> &, Value *, Value *, Value *,
 ///     [...]
 ///
 /// Returns true if the containing function was modified.
-bool
+bool expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun Factory);
-expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun Factory);
+
-}
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_ATOMICEXPANDUTILS_H

include/llvm/CodeGen/DIE.h

@@ -1,4 +1,4 @@
-//===--- lib/CodeGen/DIE.h - DWARF Info Entries -----------------*- C++ -*-===//
+//===- lib/CodeGen/DIE.h - DWARF Info Entries -------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -31,6 +31,7 @@
 #include <iterator>
 #include <new>
 #include <type_traits>
+#include <utility>
 #include <vector>
 
 namespace llvm {
@@ -53,11 +54,11 @@ class DIEAbbrevData {
   dwarf::Form Form;
 
   /// Dwarf attribute value for DW_FORM_implicit_const
-  int64_t Value;
+  int64_t Value = 0;
 
 public:
   DIEAbbrevData(dwarf::Attribute A, dwarf::Form F)
-      : Attribute(A), Form(F), Value(0) {}
+      : Attribute(A), Form(F) {}
   DIEAbbrevData(dwarf::Attribute A, int64_t V)
       : Attribute(A), Form(dwarf::DW_FORM_implicit_const), Value(V) {}
 
@@ -136,13 +137,14 @@ class DIEAbbrevSet {
   /// storage container.
   BumpPtrAllocator &Alloc;
   /// \brief FoldingSet that uniques the abbreviations.
-  llvm::FoldingSet<DIEAbbrev> AbbreviationsSet;
+  FoldingSet<DIEAbbrev> AbbreviationsSet;
   /// A list of all the unique abbreviations in use.
   std::vector<DIEAbbrev *> Abbreviations;
 
 public:
   DIEAbbrevSet(BumpPtrAllocator &A) : Alloc(A) {}
   ~DIEAbbrevSet();
+
   /// Generate the abbreviation declaration for a DIE and return a pointer to
   /// the generated abbreviation.
   ///
@@ -289,13 +291,11 @@ public:
 /// A pointer to another debug information entry.  An instance of this class can
 /// also be used as a proxy for a debug information entry not yet defined
 /// (ie. types.)
-class DIE;
 class DIEEntry {
   DIE *Entry;
 
-  DIEEntry() = delete;
-
 public:
+  DIEEntry() = delete;
   explicit DIEEntry(DIE &E) : Entry(&E) {}
 
   DIE &getEntry() const { return *Entry; }
@@ -348,10 +348,10 @@ private:
   ///
   /// All values that aren't standard layout (or are larger than 8 bytes)
   /// should be stored by reference instead of by value.
-  typedef AlignedCharArrayUnion<DIEInteger, DIEString, DIEExpr, DIELabel,
+  using ValTy = AlignedCharArrayUnion<DIEInteger, DIEString, DIEExpr, DIELabel,
-                                DIEDelta *, DIEEntry, DIEBlock *, DIELoc *,
+                                      DIEDelta *, DIEEntry, DIEBlock *,
-                                DIELocList>
+                                      DIELoc *, DIELocList>;
-      ValTy;
+
   static_assert(sizeof(ValTy) <= sizeof(uint64_t) ||
                     sizeof(ValTy) <= sizeof(void *),
                 "Expected all large types to be stored via pointer");
@@ -486,10 +486,12 @@ struct IntrusiveBackListNode {
 };
 
 struct IntrusiveBackListBase {
-  typedef IntrusiveBackListNode Node;
+  using Node = IntrusiveBackListNode;
+
   Node *Last = nullptr;
 
   bool empty() const { return !Last; }
+
   void push_back(Node &N) {
     assert(N.Next.getPointer() == &N && "Expected unlinked node");
     assert(N.Next.getInt() == true && "Expected unlinked node");
@@ -505,6 +507,7 @@ struct IntrusiveBackListBase {
 template <class T> class IntrusiveBackList : IntrusiveBackListBase {
 public:
   using IntrusiveBackListBase::empty;
+
   void push_back(T &N) { IntrusiveBackListBase::push_back(N); }
   T &back() { return *static_cast<T *>(Last); }
   const T &back() const { return *static_cast<T *>(Last); }
@@ -513,6 +516,7 @@ public:
   class iterator
       : public iterator_facade_base<iterator, std::forward_iterator_tag, T> {
     friend class const_iterator;
+
     Node *N = nullptr;
 
   public:
@@ -585,10 +589,12 @@ public:
 class DIEValueList {
   struct Node : IntrusiveBackListNode {
     DIEValue V;
+
     explicit Node(DIEValue V) : V(V) {}
   };
 
-  typedef IntrusiveBackList<Node> ListTy;
+  using ListTy = IntrusiveBackList<Node>;
+
   ListTy List;
 
 public:
@@ -597,9 +603,10 @@ public:
       : public iterator_adaptor_base<value_iterator, ListTy::iterator,
                                      std::forward_iterator_tag, DIEValue> {
     friend class const_value_iterator;
-    typedef iterator_adaptor_base<value_iterator, ListTy::iterator,
+
-                                  std::forward_iterator_tag,
+    using iterator_adaptor =
-                                  DIEValue> iterator_adaptor;
+        iterator_adaptor_base<value_iterator, ListTy::iterator,
+                              std::forward_iterator_tag, DIEValue>;
 
   public:
     value_iterator() = default;
@@ -612,9 +619,9 @@ public:
   class const_value_iterator : public iterator_adaptor_base<
                                    const_value_iterator, ListTy::const_iterator,
                                    std::forward_iterator_tag, const DIEValue> {
-    typedef iterator_adaptor_base<const_value_iterator, ListTy::const_iterator,
+    using iterator_adaptor =
-                                  std::forward_iterator_tag,
+        iterator_adaptor_base<const_value_iterator, ListTy::const_iterator,
-                                  const DIEValue> iterator_adaptor;
+                              std::forward_iterator_tag, const DIEValue>;
 
   public:
     const_value_iterator() = default;
@@ -627,8 +634,8 @@ public:
     const DIEValue &operator*() const { return wrapped()->V; }
   };
 
-  typedef iterator_range<value_iterator> value_range;
+  using value_range = iterator_range<value_iterator>;
-  typedef iterator_range<const_value_iterator> const_value_range;
+  using const_value_range = iterator_range<const_value_iterator>;
 
   value_iterator addValue(BumpPtrAllocator &Alloc, const DIEValue &V) {
     List.push_back(*new (Alloc) Node(V));
@@ -657,15 +664,15 @@ class DIE : IntrusiveBackListNode, public DIEValueList {
   friend class DIEUnit;
 
   /// Dwarf unit relative offset.
-  unsigned Offset;
+  unsigned Offset = 0;
   /// Size of instance + children.
-  unsigned Size;
+  unsigned Size = 0;
   unsigned AbbrevNumber = ~0u;
   /// Dwarf tag code.
   dwarf::Tag Tag = (dwarf::Tag)0;
   /// Set to true to force a DIE to emit an abbreviation that says it has
   /// children even when it doesn't. This is used for unit testing purposes.
-  bool ForceChildren;
+  bool ForceChildren = false;
   /// Children DIEs.
   IntrusiveBackList<DIE> Children;
 
@@ -673,20 +680,19 @@ class DIE : IntrusiveBackListNode, public DIEValueList {
   /// DIEUnit which contains this DIE as its unit DIE.
   PointerUnion<DIE *, DIEUnit *> Owner;
 
-  DIE() = delete;
+  explicit DIE(dwarf::Tag Tag) : Tag(Tag) {}
-  explicit DIE(dwarf::Tag Tag) : Offset(0), Size(0), Tag(Tag),
-      ForceChildren(false) {}
 
 public:
+  DIE() = delete;
+  DIE(const DIE &RHS) = delete;
+  DIE(DIE &&RHS) = delete;
+  DIE &operator=(const DIE &RHS) = delete;
+  DIE &operator=(const DIE &&RHS) = delete;
+
   static DIE *get(BumpPtrAllocator &Alloc, dwarf::Tag Tag) {
     return new (Alloc) DIE(Tag);
   }
 
-  DIE(const DIE &RHS) = delete;
-  DIE(DIE &&RHS) = delete;
-  void operator=(const DIE &RHS) = delete;
-  void operator=(const DIE &&RHS) = delete;
-
   // Accessors.
   unsigned getAbbrevNumber() const { return AbbrevNumber; }
   dwarf::Tag getTag() const { return Tag; }
@@ -696,10 +702,10 @@ public:
   bool hasChildren() const { return ForceChildren || !Children.empty(); }
   void setForceChildren(bool B) { ForceChildren = B; }
 
-  typedef IntrusiveBackList<DIE>::iterator child_iterator;
+  using child_iterator = IntrusiveBackList<DIE>::iterator;
-  typedef IntrusiveBackList<DIE>::const_iterator const_child_iterator;
+  using const_child_iterator = IntrusiveBackList<DIE>::const_iterator;
-  typedef iterator_range<child_iterator> child_range;
+  using child_range = iterator_range<child_iterator>;
-  typedef iterator_range<const_child_iterator> const_child_range;
+  using const_child_range = iterator_range<const_child_iterator>;
 
   child_range children() {
     return make_range(Children.begin(), Children.end());
@@ -838,10 +844,10 @@ struct BasicDIEUnit final : DIEUnit {
 /// DIELoc - Represents an expression location.
 //
 class DIELoc : public DIEValueList {
-  mutable unsigned Size; // Size in bytes excluding size header.
+  mutable unsigned Size = 0; // Size in bytes excluding size header.
 
 public:
-  DIELoc() : Size(0) {}
+  DIELoc() = default;
 
   /// ComputeSize - Calculate the size of the location expression.
   ///
@@ -872,10 +878,10 @@ public:
 /// DIEBlock - Represents a block of values.
 //
 class DIEBlock : public DIEValueList {
-  mutable unsigned Size; // Size in bytes excluding size header.
+  mutable unsigned Size = 0; // Size in bytes excluding size header.
 
 public:
-  DIEBlock() : Size(0) {}
+  DIEBlock() = default;
 
   /// ComputeSize - Calculate the size of the location expression.
   ///

include/llvm/CodeGen/FaultMaps.h

@@ -56,7 +56,7 @@ private:
           HandlerOffsetExpr(HandlerOffset) {}
   };
 
-  typedef std::vector<FaultInfo> FunctionFaultInfos;
+  using FunctionFaultInfos = std::vector<FaultInfo>;
 
   // We'd like to keep a stable iteration order for FunctionInfos to help
   // FileCheck based testing.
@@ -78,20 +78,17 @@ private:
 /// generated by the version of LLVM that includes it.  No guarantees are made
 /// with respect to forward or backward compatibility.
 class FaultMapParser {
-  typedef uint8_t FaultMapVersionType;
+  using FaultMapVersionType = uint8_t;
-  static const size_t FaultMapVersionOffset = 0;
+  using Reserved0Type = uint8_t;
+  using Reserved1Type = uint16_t;
+  using NumFunctionsType = uint32_t;
 
-  typedef uint8_t Reserved0Type;
+  static const size_t FaultMapVersionOffset = 0;
   static const size_t Reserved0Offset =
       FaultMapVersionOffset + sizeof(FaultMapVersionType);
-
-  typedef uint16_t Reserved1Type;
   static const size_t Reserved1Offset = Reserved0Offset + sizeof(Reserved0Type);
-
-  typedef uint32_t NumFunctionsType;
   static const size_t NumFunctionsOffset =
       Reserved1Offset + sizeof(Reserved1Type);
-
   static const size_t FunctionInfosOffset =
       NumFunctionsOffset + sizeof(NumFunctionsType);
 
@@ -105,14 +102,13 @@ class FaultMapParser {
 
 public:
   class FunctionFaultInfoAccessor {
-    typedef uint32_t FaultKindType;
+    using FaultKindType = uint32_t;
-    static const size_t FaultKindOffset = 0;
+    using FaultingPCOffsetType = uint32_t;
+    using HandlerPCOffsetType = uint32_t;
 
-    typedef uint32_t FaultingPCOffsetType;
+    static const size_t FaultKindOffset = 0;
     static const size_t FaultingPCOffsetOffset =
         FaultKindOffset + sizeof(FaultKindType);
-
-    typedef uint32_t HandlerPCOffsetType;
     static const size_t HandlerPCOffsetOffset =
         FaultingPCOffsetOffset + sizeof(FaultingPCOffsetType);
 
@@ -140,20 +136,17 @@ public:
   };
 
   class FunctionInfoAccessor {
-    typedef uint64_t FunctionAddrType;
+    using FunctionAddrType = uint64_t;
-    static const size_t FunctionAddrOffset = 0;
+    using NumFaultingPCsType = uint32_t;
+    using ReservedType = uint32_t;
 
-    typedef uint32_t NumFaultingPCsType;
+    static const size_t FunctionAddrOffset = 0;
     static const size_t NumFaultingPCsOffset =
         FunctionAddrOffset + sizeof(FunctionAddrType);
-
-    typedef uint32_t ReservedType;
     static const size_t ReservedOffset =
         NumFaultingPCsOffset + sizeof(NumFaultingPCsType);
-
     static const size_t FunctionFaultInfosOffset =
         ReservedOffset + sizeof(ReservedType);
-
     static const size_t FunctionInfoHeaderSize = FunctionFaultInfosOffset;
 
     const uint8_t *P = nullptr;

include/llvm/CodeGen/LiveInterval.h

@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/LiveInterval.h - Interval representation ---*- C++ -*-===//
+//===- llvm/CodeGen/LiveInterval.h - Interval representation ----*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -21,22 +21,30 @@
 #ifndef LLVM_CODEGEN_LIVEINTERVAL_H
 #define LLVM_CODEGEN_LIVEINTERVAL_H
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/IntEqClasses.h"
+#include "llvm/ADT/iterator_range.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/MC/LaneBitmask.h"
 #include "llvm/Support/Allocator.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/MathExtras.h"
+#include <algorithm>
 #include <cassert>
-#include <climits>
+#include <cstddef>
+#include <functional>
+#include <memory>
 #include <set>
+#include <tuple>
+#include <utility>
 
 namespace llvm {
+
   class CoalescerPair;
   class LiveIntervals;
-  class MachineInstr;
   class MachineRegisterInfo;
-  class TargetRegisterInfo;
   class raw_ostream;
-  template <typename T, unsigned Small> class SmallPtrSet;
 
   /// VNInfo - Value Number Information.
   /// This class holds information about a machine level values, including
@@ -44,7 +52,7 @@ namespace llvm {
   ///
   class VNInfo {
   public:
-    typedef BumpPtrAllocator Allocator;
+    using Allocator = BumpPtrAllocator;
 
     /// The ID number of this value.
     unsigned id;
@@ -53,14 +61,10 @@ namespace llvm {
     SlotIndex def;
 
     /// VNInfo constructor.
-    VNInfo(unsigned i, SlotIndex d)
+    VNInfo(unsigned i, SlotIndex d) : id(i), def(d) {}
-      : id(i), def(d)
-    { }
 
     /// VNInfo constructor, copies values from orig, except for the value number.
-    VNInfo(unsigned i, const VNInfo &orig)
+    VNInfo(unsigned i, const VNInfo &orig) : id(i), def(orig.def) {}
-      : id(i), def(orig.def)
-    { }
 
     /// Copy from the parameter into this VNInfo.
     void copyFrom(VNInfo &src) {
@@ -152,16 +156,16 @@ namespace llvm {
   /// segment with a new value number is used.
   class LiveRange {
   public:
-
     /// This represents a simple continuous liveness interval for a value.
     /// The start point is inclusive, the end point exclusive. These intervals
     /// are rendered as [start,end).
     struct Segment {
       SlotIndex start;  // Start point of the interval (inclusive)
       SlotIndex end;    // End point of the interval (exclusive)
-      VNInfo *valno;    // identifier for the value contained in this segment.
+      VNInfo *valno = nullptr; // identifier for the value contained in this
+                               // segment.
 
-      Segment() : valno(nullptr) {}
+      Segment() = default;
 
       Segment(SlotIndex S, SlotIndex E, VNInfo *V)
         : start(S), end(E), valno(V) {
@@ -189,8 +193,8 @@ namespace llvm {
       void dump() const;
     };
 
-    typedef SmallVector<Segment, 2> Segments;
+    using Segments = SmallVector<Segment, 2>;
-    typedef SmallVector<VNInfo *, 2> VNInfoList;
+    using VNInfoList = SmallVector<VNInfo *, 2>;
 
     Segments segments;   // the liveness segments
     VNInfoList valnos;   // value#'s
@@ -198,22 +202,24 @@ namespace llvm {
     // The segment set is used temporarily to accelerate initial computation
     // of live ranges of physical registers in computeRegUnitRange.
     // After that the set is flushed to the segment vector and deleted.
-    typedef std::set<Segment> SegmentSet;
+    using SegmentSet = std::set<Segment>;
     std::unique_ptr<SegmentSet> segmentSet;
 
-    typedef Segments::iterator iterator;
+    using iterator = Segments::iterator;
+    using const_iterator = Segments::const_iterator;
+
     iterator begin() { return segments.begin(); }
     iterator end()   { return segments.end(); }
 
-    typedef Segments::const_iterator const_iterator;
     const_iterator begin() const { return segments.begin(); }
     const_iterator end() const  { return segments.end(); }
 
-    typedef VNInfoList::iterator vni_iterator;
+    using vni_iterator = VNInfoList::iterator;
+    using const_vni_iterator = VNInfoList::const_iterator;
+
     vni_iterator vni_begin() { return valnos.begin(); }
     vni_iterator vni_end()   { return valnos.end(); }
 
-    typedef VNInfoList::const_iterator const_vni_iterator;
     const_vni_iterator vni_begin() const { return valnos.begin(); }
     const_vni_iterator vni_end() const   { return valnos.end(); }
 
@@ -631,40 +637,37 @@ namespace llvm {
   /// or stack slot.
   class LiveInterval : public LiveRange {
   public:
-    typedef LiveRange super;
+    using super = LiveRange;
 
     /// A live range for subregisters. The LaneMask specifies which parts of the
     /// super register are covered by the interval.
     /// (@sa TargetRegisterInfo::getSubRegIndexLaneMask()).
     class SubRange : public LiveRange {
     public:
-      SubRange *Next;
+      SubRange *Next = nullptr;
       LaneBitmask LaneMask;
 
       /// Constructs a new SubRange object.
-      SubRange(LaneBitmask LaneMask)
+      SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {}
-        : Next(nullptr), LaneMask(LaneMask) {
-      }
 
       /// Constructs a new SubRange object by copying liveness from @p Other.
       SubRange(LaneBitmask LaneMask, const LiveRange &Other,
                BumpPtrAllocator &Allocator)
-        : LiveRange(Other, Allocator), Next(nullptr), LaneMask(LaneMask) {
+        : LiveRange(Other, Allocator), LaneMask(LaneMask) {}
-      }
 
       void print(raw_ostream &OS) const;
       void dump() const;
     };
 
   private:
-    SubRange *SubRanges; ///< Single linked list of subregister live ranges.
+    SubRange *SubRanges = nullptr; ///< Single linked list of subregister live
+                                   /// ranges.
 
   public:
     const unsigned reg;  // the register or stack slot of this interval.
     float weight;        // weight of this interval
 
-    LiveInterval(unsigned Reg, float Weight)
+    LiveInterval(unsigned Reg, float Weight) : reg(Reg), weight(Weight) {}
-      : SubRanges(nullptr), reg(Reg), weight(Weight) {}
 
     ~LiveInterval() {
       clearSubRanges();
@@ -673,8 +676,10 @@ namespace llvm {
     template<typename T>
     class SingleLinkedListIterator {
       T *P;
+
     public:
       SingleLinkedListIterator<T>(T *P) : P(P) {}
+
       SingleLinkedListIterator<T> &operator++() {
         P = P->Next;
         return *this;
@@ -698,7 +703,9 @@ namespace llvm {
       }
     };
 
-    typedef SingleLinkedListIterator<SubRange> subrange_iterator;
+    using subrange_iterator = SingleLinkedListIterator<SubRange>;
+    using const_subrange_iterator = SingleLinkedListIterator<const SubRange>;
+
     subrange_iterator subrange_begin() {
       return subrange_iterator(SubRanges);
     }
@@ -706,7 +713,6 @@ namespace llvm {
       return subrange_iterator(nullptr);
     }
 
-    typedef SingleLinkedListIterator<const SubRange> const_subrange_iterator;
     const_subrange_iterator subrange_begin() const {
       return const_subrange_iterator(SubRanges);
     }
@@ -759,12 +765,12 @@ namespace llvm {
 
     /// isSpillable - Can this interval be spilled?
     bool isSpillable() const {
-      return weight != llvm::huge_valf;
+      return weight != huge_valf;
     }
 
     /// markNotSpillable - Mark interval as not spillable
     void markNotSpillable() {
-      weight = llvm::huge_valf;
+      weight = huge_valf;
     }
 
     /// For a given lane mask @p LaneMask, compute indexes at which the
@@ -931,5 +937,7 @@ namespace llvm {
     void Distribute(LiveInterval &LI, LiveInterval *LIV[],
                     MachineRegisterInfo &MRI);
   };
-}
+
-#endif
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_LIVEINTERVAL_H

include/llvm/CodeGen/LiveIntervalAnalysis.h

@@ -1,4 +1,4 @@
-//===-- LiveIntervalAnalysis.h - Live Interval Analysis ---------*- C++ -*-===//
+//===- LiveIntervalAnalysis.h - Live Interval Analysis ----------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -20,6 +20,7 @@
 #ifndef LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
 #define LLVM_CODEGEN_LIVEINTERVALANALYSIS_H
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/IndexedMap.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/Analysis/AliasAnalysis.h"
@@ -27,27 +28,29 @@
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/SlotIndexes.h"
-#include "llvm/Support/Allocator.h"
+#include "llvm/MC/LaneBitmask.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
 #include "llvm/Target/TargetRegisterInfo.h"
-#include <cmath>
+#include <cassert>
+#include <cstdint>
+#include <utility>
 
 namespace llvm {
 
 extern cl::opt<bool> UseSegmentSetForPhysRegs;
 
-  class BitVector;
+class BitVector;
-  class BlockFrequency;
+class LiveRangeCalc;
-  class LiveRangeCalc;
+class MachineBlockFrequencyInfo;
-  class LiveVariables;
+class MachineDominatorTree;
-  class MachineDominatorTree;
+class MachineFunction;
-  class MachineLoopInfo;
+class MachineInstr;
-  class TargetRegisterInfo;
+class MachineRegisterInfo;
-  class MachineRegisterInfo;
+class raw_ostream;
-  class TargetInstrInfo;
+class TargetInstrInfo;
-  class TargetRegisterClass;
+class VirtRegMap;
-  class VirtRegMap;
-  class MachineBlockFrequencyInfo;
 
   class LiveIntervals : public MachineFunctionPass {
     MachineFunction* MF;
@@ -56,8 +59,8 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
     const TargetInstrInfo* TII;
     AliasAnalysis *AA;
     SlotIndexes* Indexes;
-    MachineDominatorTree *DomTree;
+    MachineDominatorTree *DomTree = nullptr;
-    LiveRangeCalc *LRCalc;
+    LiveRangeCalc *LRCalc = nullptr;
 
     /// Special pool allocator for VNInfo's (LiveInterval val#).
     VNInfo::Allocator VNInfoAllocator;
@@ -95,6 +98,7 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
 
   public:
     static char ID;
+
     LiveIntervals();
     ~LiveIntervals() override;
 
@@ -466,6 +470,7 @@ extern cl::opt<bool> UseSegmentSetForPhysRegs;
 
     class HMEditor;
   };
-} // End llvm namespace
 
-#endif
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_LIVEINTERVALANALYSIS_H

include/llvm/CodeGen/LiveIntervalUnion.h

@@ -26,12 +26,14 @@
 
 namespace llvm {
 
+class raw_ostream;
 class TargetRegisterInfo;
 
 #ifndef NDEBUG
 // forward declaration
 template <unsigned Element> class SparseBitVector;
-typedef SparseBitVector<128> LiveVirtRegBitSet;
+
+using LiveVirtRegBitSet = SparseBitVector<128>;
 #endif
 
 /// Union of live intervals that are strong candidates for coalescing into a
@@ -42,19 +44,19 @@ class LiveIntervalUnion {
   // A set of live virtual register segments that supports fast insertion,
   // intersection, and removal.
   // Mapping SlotIndex intervals to virtual register numbers.
-  typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
+  using LiveSegments = IntervalMap<SlotIndex, LiveInterval*>;
 
 public:
   // SegmentIter can advance to the next segment ordered by starting position
   // which may belong to a different live virtual register. We also must be able
   // to reach the current segment's containing virtual register.
-  typedef LiveSegments::iterator SegmentIter;
+  using SegmentIter = LiveSegments::iterator;
 
   /// Const version of SegmentIter.
-  typedef LiveSegments::const_iterator ConstSegmentIter;
+  using ConstSegmentIter = LiveSegments::const_iterator;
 
   // LiveIntervalUnions share an external allocator.
-  typedef LiveSegments::Allocator Allocator;
+  using Allocator = LiveSegments::Allocator;
 
 private:
   unsigned Tag = 0;       // unique tag for current contents.
@@ -76,7 +78,7 @@ public:
   SlotIndex startIndex() const { return Segments.start(); }
 
   // Provide public access to the underlying map to allow overlap iteration.
-  typedef LiveSegments Map;
+  using Map = LiveSegments;
   const Map &getMap() const { return Segments; }
 
   /// getTag - Return an opaque tag representing the current state of the union.

include/llvm/CodeGen/LivePhysRegs.h

@@ -39,6 +39,9 @@
 namespace llvm {
 
 class MachineInstr;
+class MachineOperand;
+class MachineRegisterInfo;
+class raw_ostream;
 
 /// \brief A set of live physical registers with functions to track liveness
 /// when walking backward/forward through a basic block.
@@ -46,9 +49,6 @@ class LivePhysRegs {
   const TargetRegisterInfo *TRI = nullptr;
   SparseSet<unsigned> LiveRegs;
 
-  LivePhysRegs(const LivePhysRegs&) = delete;
-  LivePhysRegs &operator=(const LivePhysRegs&) = delete;
-
 public:
   /// \brief Constructs a new empty LivePhysRegs set.
   LivePhysRegs() = default;
@@ -59,6 +59,9 @@ public:
     LiveRegs.setUniverse(TRI->getNumRegs());
   }
 
+  LivePhysRegs(const LivePhysRegs&) = delete;
+  LivePhysRegs &operator=(const LivePhysRegs&) = delete;
+
   /// \brief Clear and initialize the LivePhysRegs set.
   void init(const TargetRegisterInfo &TRI) {
     this->TRI = &TRI;
@@ -134,7 +137,8 @@ public:
   /// registers.
   void addLiveOutsNoPristines(const MachineBasicBlock &MBB);
 
-  typedef SparseSet<unsigned>::const_iterator const_iterator;
+  using const_iterator = SparseSet<unsigned>::const_iterator;
+
   const_iterator begin() const { return LiveRegs.begin(); }
   const_iterator end() const { return LiveRegs.end(); }
 

include/llvm/CodeGen/LiveRangeEdit.h

@@ -1,4 +1,4 @@
-//===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
+//===- LiveRangeEdit.h - Basic tools for split and spill --------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -19,19 +19,28 @@
 #define LLVM_CODEGEN_LIVERANGEEDIT_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/None.h"
 #include "llvm/ADT/SetVector.h"
 #include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/Analysis/AliasAnalysis.h"
 #include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
 
 namespace llvm {
 
 class LiveIntervals;
 class MachineBlockFrequencyInfo;
+class MachineInstr;
 class MachineLoopInfo;
+class MachineOperand;
+class TargetInstrInfo;
+class TargetRegisterInfo;
 class VirtRegMap;
 
 class LiveRangeEdit : private MachineRegisterInfo::Delegate {
@@ -39,7 +48,10 @@ public:
   /// Callback methods for LiveRangeEdit owners.
   class Delegate {
     virtual void anchor();
+
   public:
+    virtual ~Delegate() = default;
+
     /// Called immediately before erasing a dead machine instruction.
     virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
 
@@ -53,8 +65,6 @@ public:
     /// Called after cloning a virtual register.
     /// This is used for new registers representing connected components of Old.
     virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
-
-    virtual ~Delegate() {}
   };
 
 private:
@@ -70,7 +80,7 @@ private:
   const unsigned FirstNew;
 
   /// ScannedRemattable - true when remattable values have been identified.
-  bool ScannedRemattable;
+  bool ScannedRemattable = false;
 
   /// DeadRemats - The saved instructions which have already been dead after
   /// rematerialization but not deleted yet -- to be done in postOptimization.
@@ -78,11 +88,11 @@ private:
 
   /// Remattable - Values defined by remattable instructions as identified by
   /// tii.isTriviallyReMaterializable().
-  SmallPtrSet<const VNInfo*,4> Remattable;
+  SmallPtrSet<const VNInfo *, 4> Remattable;
 
   /// Rematted - Values that were actually rematted, and so need to have their
   /// live range trimmed or entirely removed.
-  SmallPtrSet<const VNInfo*,4> Rematted;
+  SmallPtrSet<const VNInfo *, 4> Rematted;
 
   /// scanRemattable - Identify the Parent values that may rematerialize.
   void scanRemattable(AliasAnalysis *aa);
@@ -94,11 +104,11 @@ private:
 
   /// foldAsLoad - If LI has a single use and a single def that can be folded as
   /// a load, eliminate the register by folding the def into the use.
-  bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
+  bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr *> &Dead);
+
+  using ToShrinkSet = SetVector<LiveInterval *, SmallVector<LiveInterval *, 8>,
+                                SmallPtrSet<LiveInterval *, 8>>;
 
-  typedef SetVector<LiveInterval*,
-                    SmallVector<LiveInterval*, 8>,
-                    SmallPtrSet<LiveInterval*, 8> > ToShrinkSet;
   /// Helper for eliminateDeadDefs.
   void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
                         AliasAnalysis *AA);
@@ -129,26 +139,26 @@ public:
                 SmallPtrSet<MachineInstr *, 32> *deadRemats = nullptr)
       : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
         VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
-        FirstNew(newRegs.size()), ScannedRemattable(false),
+        FirstNew(newRegs.size()), DeadRemats(deadRemats) {
-        DeadRemats(deadRemats) {
     MRI.setDelegate(this);
   }
 
   ~LiveRangeEdit() override { MRI.resetDelegate(this); }
 
   LiveInterval &getParent() const {
-   assert(Parent && "No parent LiveInterval");
+    assert(Parent && "No parent LiveInterval");
-   return *Parent;
+    return *Parent;
   }
+
   unsigned getReg() const { return getParent().reg; }
 
   /// Iterator for accessing the new registers added by this edit.
-  typedef SmallVectorImpl<unsigned>::const_iterator iterator;
+  using iterator = SmallVectorImpl<unsigned>::const_iterator;
-  iterator begin() const { return NewRegs.begin()+FirstNew; }
+  iterator begin() const { return NewRegs.begin() + FirstNew; }
   iterator end() const { return NewRegs.end(); }
-  unsigned size() const { return NewRegs.size()-FirstNew; }
+  unsigned size() const { return NewRegs.size() - FirstNew; }
   bool empty() const { return size() == 0; }
-  unsigned get(unsigned idx) const { return NewRegs[idx+FirstNew]; }
+  unsigned get(unsigned idx) const { return NewRegs[idx + FirstNew]; }
 
   /// pop_back - It allows LiveRangeEdit users to drop new registers.
   /// The context is when an original def instruction of a register is
@@ -176,26 +186,25 @@ public:
     return createEmptyIntervalFrom(getReg());
   }
 
-  unsigned create() {
+  unsigned create() { return createFrom(getReg()); }
-    return createFrom(getReg());
-  }
 
   /// anyRematerializable - Return true if any parent values may be
   /// rematerializable.
   /// This function must be called before any rematerialization is attempted.
-  bool anyRematerializable(AliasAnalysis*);
+  bool anyRematerializable(AliasAnalysis *);
 
   /// checkRematerializable - Manually add VNI to the list of rematerializable
   /// values if DefMI may be rematerializable.
   bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
-                             AliasAnalysis*);
+                             AliasAnalysis *);
 
   /// Remat - Information needed to rematerialize at a specific location.
   struct Remat {
-    VNInfo *ParentVNI;      // parent_'s value at the remat location.
+    VNInfo *ParentVNI;              // parent_'s value at the remat location.
-    MachineInstr *OrigMI;   // Instruction defining OrigVNI. It contains the
+    MachineInstr *OrigMI = nullptr; // Instruction defining OrigVNI. It contains
-                            // real expr for remat.
+                                    // the real expr for remat.
-    explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(nullptr) {}
+
+    explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI) {}
   };
 
   /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
@@ -209,10 +218,8 @@ public:
   /// liveness is not updated.
   /// Return the SlotIndex of the new instruction.
   SlotIndex rematerializeAt(MachineBasicBlock &MBB,
-                            MachineBasicBlock::iterator MI,
+                            MachineBasicBlock::iterator MI, unsigned DestReg,
-                            unsigned DestReg,
+                            const Remat &RM, const TargetRegisterInfo &,
-                            const Remat &RM,
-                            const TargetRegisterInfo&,
                             bool Late = false);
 
   /// markRematerialized - explicitly mark a value as rematerialized after doing
@@ -248,11 +255,10 @@ public:
 
   /// calculateRegClassAndHint - Recompute register class and hint for each new
   /// register.
-  void calculateRegClassAndHint(MachineFunction&,
+  void calculateRegClassAndHint(MachineFunction &, const MachineLoopInfo &,
-                                const MachineLoopInfo&,
+                                const MachineBlockFrequencyInfo &);
-                                const MachineBlockFrequencyInfo&);
 };
 
-}
+} // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_LIVERANGEEDIT_H

include/llvm/CodeGen/LiveStackAnalysis.h

@@ -1,4 +1,4 @@
-//===-- LiveStackAnalysis.h - Live Stack Slot Analysis ----------*- C++ -*-===//
+//===- LiveStackAnalysis.h - Live Stack Slot Analysis -----------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -18,13 +18,16 @@
 
 #include "llvm/CodeGen/LiveInterval.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/Support/Allocator.h"
+#include "llvm/Pass.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include <cassert>
 #include <map>
 #include <unordered_map>
 
 namespace llvm {
 
+class TargetRegisterClass;
+class TargetRegisterInfo;
+
 class LiveStacks : public MachineFunctionPass {
   const TargetRegisterInfo *TRI;
 
@@ -33,8 +36,7 @@ class LiveStacks : public MachineFunctionPass {
   VNInfo::Allocator VNInfoAllocator;
 
   /// S2IMap - Stack slot indices to live interval mapping.
-  ///
+  using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
-  typedef std::unordered_map<int, LiveInterval> SS2IntervalMap;
   SS2IntervalMap S2IMap;
 
   /// S2RCMap - Stack slot indices to register class mapping.
@@ -42,12 +44,14 @@ class LiveStacks : public MachineFunctionPass {
 
 public:
   static char ID; // Pass identification, replacement for typeid
+
   LiveStacks() : MachineFunctionPass(ID) {
     initializeLiveStacksPass(*PassRegistry::getPassRegistry());
   }
 
-  typedef SS2IntervalMap::iterator iterator;
+  using iterator = SS2IntervalMap::iterator;
-  typedef SS2IntervalMap::const_iterator const_iterator;
+  using const_iterator = SS2IntervalMap::const_iterator;
+
   const_iterator begin() const { return S2IMap.begin(); }
   const_iterator end() const { return S2IMap.end(); }
   iterator begin() { return S2IMap.begin(); }
@@ -93,6 +97,7 @@ public:
   /// print - Implement the dump method.
   void print(raw_ostream &O, const Module * = nullptr) const override;
 };
-}
 
-#endif /* LLVM_CODEGEN_LIVESTACK_ANALYSIS_H */
+} // end namespace llvm
+
+#endif // LLVM_CODEGEN_LIVESTACK_ANALYSIS_H

include/llvm/CodeGen/MachineBasicBlock.h

@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/MachineBasicBlock.h ------------------------*- C++ -*-===//
+//===- llvm/CodeGen/MachineBasicBlock.h -------------------------*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -15,41 +15,50 @@
 #define LLVM_CODEGEN_MACHINEBASICBLOCK_H
 
 #include "llvm/ADT/GraphTraits.h"
+#include "llvm/ADT/ilist.h"
+#include "llvm/ADT/ilist_node.h"
 #include "llvm/ADT/iterator_range.h"
+#include "llvm/ADT/simple_ilist.h"
 #include "llvm/CodeGen/MachineInstrBundleIterator.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/IR/DebugLoc.h"
 #include "llvm/Support/BranchProbability.h"
 #include "llvm/MC/LaneBitmask.h"
 #include "llvm/MC/MCRegisterInfo.h"
-#include "llvm/Support/DataTypes.h"
+#include <cassert>
+#include <cstdint>
 #include <functional>
+#include <iterator>
+#include <string>
+#include <vector>
 
 namespace llvm {
 
-class Pass;
 class BasicBlock;
 class MachineFunction;
 class MCSymbol;
-class MIPrinter;
+class ModuleSlotTracker;
+class Pass;
 class SlotIndexes;
 class StringRef;
 class raw_ostream;
-class MachineBranchProbabilityInfo;
+class TargetRegisterClass;
+class TargetRegisterInfo;
 
 template <> struct ilist_traits<MachineInstr> {
 private:
   friend class MachineBasicBlock; // Set by the owning MachineBasicBlock.
+
   MachineBasicBlock *Parent;
 
-  typedef simple_ilist<MachineInstr, ilist_sentinel_tracking<true>>::iterator
+  using instr_iterator =
-      instr_iterator;
+      simple_ilist<MachineInstr, ilist_sentinel_tracking<true>>::iterator;
 
 public:
   void addNodeToList(MachineInstr *N);
   void removeNodeFromList(MachineInstr *N);
   void transferNodesFromList(ilist_traits &OldList, instr_iterator First,
                              instr_iterator Last);
-
   void deleteNode(MachineInstr *MI);
 };
 
@@ -69,7 +78,8 @@ public:
   };
 
 private:
-  typedef ilist<MachineInstr, ilist_sentinel_tracking<true>> Instructions;
+  using Instructions = ilist<MachineInstr, ilist_sentinel_tracking<true>>;
+
   Instructions Insts;
   const BasicBlock *BB;
   int Number;
@@ -83,12 +93,12 @@ private:
   /// same order as Successors, or it is empty if we don't use it (disable
   /// optimization).
   std::vector<BranchProbability> Probs;
-  typedef std::vector<BranchProbability>::iterator probability_iterator;
+  using probability_iterator = std::vector<BranchProbability>::iterator;
-  typedef std::vector<BranchProbability>::const_iterator
+  using const_probability_iterator =
-      const_probability_iterator;
+      std::vector<BranchProbability>::const_iterator;
 
   /// Keep track of the physical registers that are livein of the basicblock.
-  typedef std::vector<RegisterMaskPair> LiveInVector;
+  using LiveInVector = std::vector<RegisterMaskPair>;
   LiveInVector LiveIns;
 
   /// Alignment of the basic block. Zero if the basic block does not need to be
@@ -113,7 +123,7 @@ private:
   mutable MCSymbol *CachedMCSymbol = nullptr;
 
   // Intrusive list support
-  MachineBasicBlock() {}
+  MachineBasicBlock() = default;
 
   explicit MachineBasicBlock(MachineFunction &MF, const BasicBlock *BB);
 
@@ -145,16 +155,16 @@ public:
   const MachineFunction *getParent() const { return xParent; }
   MachineFunction *getParent() { return xParent; }
 
-  typedef Instructions::iterator                                 instr_iterator;
+  using instr_iterator = Instructions::iterator;
-  typedef Instructions::const_iterator                     const_instr_iterator;
+  using const_instr_iterator = Instructions::const_iterator;
-  typedef Instructions::reverse_iterator reverse_instr_iterator;
+  using reverse_instr_iterator = Instructions::reverse_iterator;
-  typedef Instructions::const_reverse_iterator const_reverse_instr_iterator;
+  using const_reverse_instr_iterator = Instructions::const_reverse_iterator;
 
-  typedef MachineInstrBundleIterator<MachineInstr> iterator;
+  using iterator = MachineInstrBundleIterator<MachineInstr>;
-  typedef MachineInstrBundleIterator<const MachineInstr> const_iterator;
+  using const_iterator = MachineInstrBundleIterator<const MachineInstr>;
-  typedef MachineInstrBundleIterator<MachineInstr, true> reverse_iterator;
+  using reverse_iterator = MachineInstrBundleIterator<MachineInstr, true>;
-  typedef MachineInstrBundleIterator<const MachineInstr, true>
+  using const_reverse_iterator =
-      const_reverse_iterator;
+      MachineInstrBundleIterator<const MachineInstr, true>;
 
   unsigned size() const { return (unsigned)Insts.size(); }
   bool empty() const { return Insts.empty(); }
@@ -178,8 +188,8 @@ public:
   reverse_instr_iterator       instr_rend  ()       { return Insts.rend();   }
   const_reverse_instr_iterator instr_rend  () const { return Insts.rend();   }
 
-  typedef iterator_range<instr_iterator> instr_range;
+  using instr_range = iterator_range<instr_iterator>;
-  typedef iterator_range<const_instr_iterator> const_instr_range;
+  using const_instr_range = iterator_range<const_instr_iterator>;
   instr_range instrs() { return instr_range(instr_begin(), instr_end()); }
   const_instr_range instrs() const {
     return const_instr_range(instr_begin(), instr_end());
@@ -213,18 +223,18 @@ public:
   }
 
   // Machine-CFG iterators
-  typedef std::vector<MachineBasicBlock *>::iterator       pred_iterator;
+  using pred_iterator = std::vector<MachineBasicBlock *>::iterator;
-  typedef std::vector<MachineBasicBlock *>::const_iterator const_pred_iterator;
+  using const_pred_iterator = std::vector<MachineBasicBlock *>::const_iterator;
-  typedef std::vector<MachineBasicBlock *>::iterator       succ_iterator;
+  using succ_iterator = std::vector<MachineBasicBlock *>::iterator;
-  typedef std::vector<MachineBasicBlock *>::const_iterator const_succ_iterator;
+  using const_succ_iterator = std::vector<MachineBasicBlock *>::const_iterator;
-  typedef std::vector<MachineBasicBlock *>::reverse_iterator
+  using pred_reverse_iterator =
-                                                         pred_reverse_iterator;
+      std::vector<MachineBasicBlock *>::reverse_iterator;
-  typedef std::vector<MachineBasicBlock *>::const_reverse_iterator
+  using const_pred_reverse_iterator =
-                                                   const_pred_reverse_iterator;
+      std::vector<MachineBasicBlock *>::const_reverse_iterator;
-  typedef std::vector<MachineBasicBlock *>::reverse_iterator
+  using succ_reverse_iterator =
-                                                         succ_reverse_iterator;
+      std::vector<MachineBasicBlock *>::reverse_iterator;
-  typedef std::vector<MachineBasicBlock *>::const_reverse_iterator
+  using const_succ_reverse_iterator =
-                                                   const_succ_reverse_iterator;
+      std::vector<MachineBasicBlock *>::const_reverse_iterator;
   pred_iterator        pred_begin()       { return Predecessors.begin(); }
   const_pred_iterator  pred_begin() const { return Predecessors.begin(); }
   pred_iterator        pred_end()         { return Predecessors.end();   }
@@ -307,7 +317,7 @@ public:
 
   // Iteration support for live in sets.  These sets are kept in sorted
   // order by their register number.
-  typedef LiveInVector::const_iterator livein_iterator;
+  using livein_iterator = LiveInVector::const_iterator;
 #ifndef NDEBUG
   /// Unlike livein_begin, this method does not check that the liveness
   /// information is accurate. Still for debug purposes it may be useful
@@ -455,7 +465,6 @@ public:
   /// other block.
   bool isLayoutSuccessor(const MachineBasicBlock *MBB) const;
 
-
   /// Return the fallthrough block if the block can implicitly
   /// transfer control to the block after it by falling off the end of
   /// it.  This should return null if it can reach the block after
@@ -695,7 +704,7 @@ public:
   LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
                                               unsigned Reg,
                                               const_iterator Before,
-                                              unsigned Neighborhood=10) const;
+                                              unsigned Neighborhood = 10) const;
 
   // Debugging methods.
   void dump() const;
@@ -714,7 +723,6 @@ public:
   /// Return the MCSymbol for this basic block.
   MCSymbol *getSymbol() const;
 
-
 private:
   /// Return probability iterator corresponding to the I successor iterator.
   probability_iterator getProbabilityIterator(succ_iterator I);
@@ -764,8 +772,8 @@ struct MBB2NumberFunctor :
 //
 
 template <> struct GraphTraits<MachineBasicBlock *> {
-  typedef MachineBasicBlock *NodeRef;
+  using NodeRef = MachineBasicBlock *;
-  typedef MachineBasicBlock::succ_iterator ChildIteratorType;
+  using ChildIteratorType = MachineBasicBlock::succ_iterator;
 
   static NodeRef getEntryNode(MachineBasicBlock *BB) { return BB; }
   static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
@@ -773,8 +781,8 @@ template <> struct GraphTraits<MachineBasicBlock *> {
 };
 
 template <> struct GraphTraits<const MachineBasicBlock *> {
-  typedef const MachineBasicBlock *NodeRef;
+  using NodeRef = const MachineBasicBlock *;
-  typedef MachineBasicBlock::const_succ_iterator ChildIteratorType;
+  using ChildIteratorType = MachineBasicBlock::const_succ_iterator;
 
   static NodeRef getEntryNode(const MachineBasicBlock *BB) { return BB; }
   static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
@@ -787,28 +795,30 @@ template <> struct GraphTraits<const MachineBasicBlock *> {
 // to be when traversing the predecessor edges of a MBB
 // instead of the successor edges.
 //
-template <> struct GraphTraits<Inverse<MachineBasicBlock*> > {
+template <> struct GraphTraits<Inverse<MachineBasicBlock*>> {
-  typedef MachineBasicBlock *NodeRef;
+  using NodeRef = MachineBasicBlock *;
-  typedef MachineBasicBlock::pred_iterator ChildIteratorType;
+  using ChildIteratorType = MachineBasicBlock::pred_iterator;
+
   static NodeRef getEntryNode(Inverse<MachineBasicBlock *> G) {
     return G.Graph;
   }
+
   static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
   static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
 };
 
-template <> struct GraphTraits<Inverse<const MachineBasicBlock*> > {
+template <> struct GraphTraits<Inverse<const MachineBasicBlock*>> {
-  typedef const MachineBasicBlock *NodeRef;
+  using NodeRef = const MachineBasicBlock *;
-  typedef MachineBasicBlock::const_pred_iterator ChildIteratorType;
+  using ChildIteratorType = MachineBasicBlock::const_pred_iterator;
+
   static NodeRef getEntryNode(Inverse<const MachineBasicBlock *> G) {
     return G.Graph;
   }
+
   static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
   static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
 };
 
-
-
 /// MachineInstrSpan provides an interface to get an iteration range
 /// containing the instruction it was initialized with, along with all
 /// those instructions inserted prior to or following that instruction
@@ -816,6 +826,7 @@ template <> struct GraphTraits<Inverse<const MachineBasicBlock*> > {
 class MachineInstrSpan {
   MachineBasicBlock &MBB;
   MachineBasicBlock::iterator I, B, E;
+
 public:
   MachineInstrSpan(MachineBasicBlock::iterator I)
     : MBB(*I->getParent()),
@@ -854,6 +865,6 @@ inline IterT skipDebugInstructionsBackward(IterT It, IterT Begin) {
   return It;
 }
 
-} // End llvm namespace
+} // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_MACHINEBASICBLOCK_H

include/llvm/CodeGen/MachineBlockFrequencyInfo.h

@@ -1,4 +1,4 @@
-//===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -*- C++ -*-----===//
+//===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -----*- C++ -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -17,26 +17,28 @@
 #include "llvm/ADT/Optional.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/Support/BlockFrequency.h"
-#include <climits>
+#include <cstdint>
+#include <memory>
 
 namespace llvm {
 
+template <class BlockT> class BlockFrequencyInfoImpl;
 class MachineBasicBlock;
 class MachineBranchProbabilityInfo;
+class MachineFunction;
 class MachineLoopInfo;
-template <class BlockT> class BlockFrequencyInfoImpl;
+class raw_ostream;
 
 /// MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation
 /// to estimate machine basic block frequencies.
 class MachineBlockFrequencyInfo : public MachineFunctionPass {
-  typedef BlockFrequencyInfoImpl<MachineBasicBlock> ImplType;
+  using ImplType = BlockFrequencyInfoImpl<MachineBasicBlock>;
   std::unique_ptr<ImplType> MBFI;
 
 public:
   static char ID;
 
   MachineBlockFrequencyInfo();
-
   ~MachineBlockFrequencyInfo() override;
 
   void getAnalysisUsage(AnalysisUsage &AU) const override;
@@ -74,9 +76,8 @@ public:
                               const MachineBasicBlock *MBB) const;
 
   uint64_t getEntryFreq() const;
-
 };
 
-}
+} // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H

include/llvm/CodeGen/MachineDominanceFrontier.h

@@ -11,23 +11,28 @@
 #define LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
 
 #include "llvm/Analysis/DominanceFrontier.h"
+#include "llvm/Analysis/DominanceFrontierImpl.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
-
+#include "llvm/Support/GenericDomTree.h"
+#include <vector>
 
 namespace llvm {
 
 class MachineDominanceFrontier : public MachineFunctionPass {
   ForwardDominanceFrontierBase<MachineBasicBlock> Base;
-public:
-  typedef DominatorTreeBase<MachineBasicBlock> DomTreeT;
-  typedef DomTreeNodeBase<MachineBasicBlock> DomTreeNodeT;
-  typedef DominanceFrontierBase<MachineBasicBlock>::DomSetType DomSetType;
-  typedef DominanceFrontierBase<MachineBasicBlock>::iterator iterator;
-  typedef DominanceFrontierBase<MachineBasicBlock>::const_iterator const_iterator;
 
-  void operator=(const MachineDominanceFrontier &) = delete;
+public:
+  using DomTreeT = DominatorTreeBase<MachineBasicBlock>;
+  using DomTreeNodeT = DomTreeNodeBase<MachineBasicBlock>;
+  using DomSetType = DominanceFrontierBase<MachineBasicBlock>::DomSetType;
+  using iterator = DominanceFrontierBase<MachineBasicBlock>::iterator;
+  using const_iterator =
+      DominanceFrontierBase<MachineBasicBlock>::const_iterator;
+
   MachineDominanceFrontier(const MachineDominanceFrontier &) = delete;
+  MachineDominanceFrontier &
+  operator=(const MachineDominanceFrontier &) = delete;
 
   static char ID;
 
@@ -104,6 +109,6 @@ public:
   void getAnalysisUsage(AnalysisUsage &AU) const override;
 };
 
-}
+} // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H

include/llvm/CodeGen/MachineDominators.h

@@ -1,4 +1,4 @@
-//=- llvm/CodeGen/MachineDominators.h - Machine Dom Calculation --*- C++ -*-==//
+//==- llvm/CodeGen/MachineDominators.h - Machine Dom Calculation -*- C++ -*-==//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -16,12 +16,15 @@
 #define LLVM_CODEGEN_MACHINEDOMINATORS_H
 
 #include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/Support/GenericDomTree.h"
 #include "llvm/Support/GenericDomTreeConstruction.h"
+#include <cassert>
 #include <memory>
+#include <vector>
 
 namespace llvm {
 
@@ -33,7 +36,7 @@ inline void DominatorTreeBase<MachineBasicBlock>::addRoot(MachineBasicBlock* MBB
 extern template class DomTreeNodeBase<MachineBasicBlock>;
 extern template class DominatorTreeBase<MachineBasicBlock>;
 
-typedef DomTreeNodeBase<MachineBasicBlock> MachineDomTreeNode;
+using MachineDomTreeNode = DomTreeNodeBase<MachineBasicBlock>;
 
 //===-------------------------------------
 /// DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to
@@ -52,6 +55,7 @@ class MachineDominatorTree : public MachineFunctionPass {
   /// The splitting of a critical edge is local and thus, it is possible
   /// to apply several of those changes at the same time.
   mutable SmallVector<CriticalEdge, 32> CriticalEdgesToSplit;
+
   /// \brief Remember all the basic blocks that are inserted during
   /// edge splitting.
   /// Invariant: NewBBs == all the basic blocks contained in the NewBB
@@ -259,8 +263,8 @@ public:
 
 template <class Node, class ChildIterator>
 struct MachineDomTreeGraphTraitsBase {
-  typedef Node *NodeRef;
+  using NodeRef = Node *;
-  typedef ChildIterator ChildIteratorType;
+  using ChildIteratorType = ChildIterator;
 
   static NodeRef getEntryNode(NodeRef N) { return N; }
   static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
@@ -287,6 +291,6 @@ template <> struct GraphTraits<MachineDominatorTree*>
   }
 };
 
-}
+} // end namespace llvm
 
-#endif
+#endif // LLVM_CODEGEN_MACHINEDOMINATORS_H

lib/CodeGen/LiveIntervalAnalysis.cpp

@@ -1,4 +1,4 @@
-//===-- LiveIntervalAnalysis.cpp - Live Interval Analysis -----------------===//
+//===- LiveIntervalAnalysis.cpp - Live Interval Analysis ------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -14,28 +14,45 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "LiveRangeCalc.h"
-#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/DepthFirstIterator.h"
+#include "llvm/ADT/iterator_range.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/CodeGen/LiveInterval.h"
+#include "llvm/CodeGen/LiveIntervalAnalysis.h"
 #include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
 #include "llvm/CodeGen/MachineDominators.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineInstrBundle.h"
+#include "llvm/CodeGen/MachineOperand.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/SlotIndexes.h"
 #include "llvm/CodeGen/VirtRegMap.h"
-#include "llvm/IR/Value.h"
+#include "llvm/MC/LaneBitmask.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/Pass.h"
 #include "llvm/Support/BlockFrequency.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include "llvm/Target/TargetSubtargetInfo.h"
 #include <algorithm>
-#include <cmath>
+#include <cassert>
+#include <cstdint>
+#include <iterator>
+#include <tuple>
+#include <utility>
+
 using namespace llvm;
 
 #define DEBUG_TYPE "regalloc"
@@ -59,11 +76,13 @@ static bool EnablePrecomputePhysRegs = false;
 #endif // NDEBUG
 
 namespace llvm {
+
 cl::opt<bool> UseSegmentSetForPhysRegs(
     "use-segment-set-for-physregs", cl::Hidden, cl::init(true),
     cl::desc(
         "Use segment set for the computation of the live ranges of physregs."));
-}
+
+} // end namespace llvm
 
 void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.setPreservesCFG();
@@ -78,8 +97,7 @@ void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
   MachineFunctionPass::getAnalysisUsage(AU);
 }
 
-LiveIntervals::LiveIntervals() : MachineFunctionPass(ID),
+LiveIntervals::LiveIntervals() : MachineFunctionPass(ID) {
-  DomTree(nullptr), LRCalc(nullptr) {
   initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
 }
 
@@ -168,12 +186,10 @@ LLVM_DUMP_METHOD void LiveIntervals::dumpInstrs() const {
 #endif
 
 LiveInterval* LiveIntervals::createInterval(unsigned reg) {
-  float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ?
+  float Weight = TargetRegisterInfo::isPhysicalRegister(reg) ? huge_valf : 0.0F;
-                  llvm::huge_valf : 0.0F;
   return new LiveInterval(reg, Weight);
 }
 
-
 /// Compute the live interval of a virtual register, based on defs and uses.
 void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
   assert(LRCalc && "LRCalc not initialized.");
@@ -337,7 +353,7 @@ static void createSegmentsForValues(LiveRange &LR,
   }
 }
 
-typedef SmallVector<std::pair<SlotIndex, VNInfo*>, 16> ShrinkToUsesWorkList;
+using ShrinkToUsesWorkList = SmallVector<std::pair<SlotIndex, VNInfo*>, 16>;
 
 static void extendSegmentsToUses(LiveRange &LR, const SlotIndexes &Indexes,
                                  ShrinkToUsesWorkList &WorkList,
@@ -593,7 +609,7 @@ void LiveIntervals::pruneValue(LiveRange &LR, SlotIndex Kill,
   // Find all blocks that are reachable from KillMBB without leaving VNI's live
   // range. It is possible that KillMBB itself is reachable, so start a DFS
   // from each successor.
-  typedef df_iterator_default_set<MachineBasicBlock*,9> VisitedTy;
+  using VisitedTy = df_iterator_default_set<MachineBasicBlock*,9>;
   VisitedTy Visited;
   for (MachineBasicBlock *Succ : KillMBB->successors()) {
     for (df_ext_iterator<MachineBasicBlock*, VisitedTy>
@@ -822,7 +838,6 @@ LiveIntervals::addSegmentToEndOfBlock(unsigned reg, MachineInstr &startInst) {
   return S;
 }
 
-
 //===----------------------------------------------------------------------===//
 //                          Register mask functions
 //===----------------------------------------------------------------------===//
@@ -855,7 +870,7 @@ bool LiveIntervals::checkRegMaskInterference(LiveInterval &LI,
     return false;
 
   bool Found = false;
-  for (;;) {
+  while (true) {
     assert(*SlotI >= LiveI->start);
     // Loop over all slots overlapping this segment.
     while (*SlotI < LiveI->end) {