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AMDGPU/GlobalISel: Define instruction mapping for G_FPTOSI
Patch by Tom Stellard llvm-svn: 326534
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@ -293,6 +293,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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// Fall-through
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case AMDGPU::G_FADD:
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case AMDGPU::G_FPTOSI:
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case AMDGPU::G_FPTOUI:
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case AMDGPU::G_FMUL:
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return getDefaultMappingVOP(MI);
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31
test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
Normal file
31
test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
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@ -0,0 +1,31 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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---
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name: fptosi_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: fptosi_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[FPTOSI:%[0-9]+]]:vgpr(s32) = G_FPTOSI [[COPY]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_FPTOSI %0
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...
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---
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name: fptosi_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: fptosi_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[FPTOSI:%[0-9]+]]:vgpr(s32) = G_FPTOSI [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_FPTOSI %0
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...
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