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Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions.
llvm-svn: 37465
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parent
4de6599e83
commit
1be50b2f54
@ -97,6 +97,7 @@ namespace llvm {
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bool hasVariableNumberOfOperands;
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bool hasCtrlDep;
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bool noResults;
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bool clobbersPred;
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/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
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/// where $foo is a whole operand and $foo.bar refers to a suboperand.
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@ -360,6 +360,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
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usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
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hasCtrlDep = R->getValueAsBit("hasCtrlDep");
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noResults = R->getValueAsBit("noResults");
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clobbersPred = R->getValueAsBit("clobbersPred");
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hasVariableNumberOfOperands = false;
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DagInit *DI;
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@ -241,6 +241,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
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if (Inst.isCommutable) OS << "|M_COMMUTABLE";
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if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
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if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
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if (Inst.clobbersPred) OS << "|M_CLOBBERS_PRED";
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if (Inst.usesCustomDAGSchedInserter)
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OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
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if (Inst.hasVariableNumberOfOperands)
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