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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00

Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/

It's a SelectionDAG thing, not a Target thing.

llvm-svn: 258939
This commit is contained in:
Benjamin Kramer 2016-01-27 16:32:26 +00:00
parent 88aefe078a
commit 1d1115c0c4
24 changed files with 94 additions and 110 deletions

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@ -37,7 +37,7 @@ class MachineFunction;
class MDNode;
class SDDbgValue;
class TargetLowering;
class TargetSelectionDAGInfo;
class SelectionDAGTargetInfo;
class SDVTListNode : public FoldingSetNode {
friend struct FoldingSetTrait<SDVTListNode>;
@ -178,7 +178,7 @@ void checkForCycles(const SelectionDAG *DAG, bool force = false);
///
class SelectionDAG {
const TargetMachine &TM;
const TargetSelectionDAGInfo *TSI;
const SelectionDAGTargetInfo *TSI;
const TargetLowering *TLI;
MachineFunction *MF;
LLVMContext *Context;
@ -287,7 +287,7 @@ public:
const TargetMachine &getTarget() const { return TM; }
const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); }
const TargetLowering &getTargetLoweringInfo() const { return *TLI; }
const TargetSelectionDAGInfo &getSelectionDAGInfo() const { return *TSI; }
const SelectionDAGTargetInfo &getSelectionDAGInfo() const { return *TSI; }
LLVMContext *getContext() const {return Context; }
/// Pop up a GraphViz/gv window with the DAG rendered using 'dot'.

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@ -1,4 +1,4 @@
//==-- llvm/Target/TargetSelectionDAGInfo.h - SelectionDAG Info --*- C++ -*-==//
//==-- llvm/CodeGen/SelectionDAGTargetInfo.h - SelectionDAG Info -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@ -7,14 +7,14 @@
//
//===----------------------------------------------------------------------===//
//
// This file declares the TargetSelectionDAGInfo class, which targets can
// This file declares the SelectionDAGTargetInfo class, which targets can
// subclass to parameterize the SelectionDAG lowering and instruction
// selection process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_TARGETSELECTIONDAGINFO_H
#define LLVM_TARGET_TARGETSELECTIONDAGINFO_H
#ifndef LLVM_CODEGEN_SELECTIONDAGTARGETINFO_H
#define LLVM_CODEGEN_SELECTIONDAGTARGETINFO_H
#include "llvm/CodeGen/SelectionDAGNodes.h"
@ -24,13 +24,13 @@ namespace llvm {
/// Targets can subclass this to parameterize the
/// SelectionDAG lowering and instruction selection process.
///
class TargetSelectionDAGInfo {
TargetSelectionDAGInfo(const TargetSelectionDAGInfo &) = delete;
void operator=(const TargetSelectionDAGInfo &) = delete;
class SelectionDAGTargetInfo {
SelectionDAGTargetInfo(const SelectionDAGTargetInfo &) = delete;
void operator=(const SelectionDAGTargetInfo &) = delete;
public:
explicit TargetSelectionDAGInfo() = default;
virtual ~TargetSelectionDAGInfo();
explicit SelectionDAGTargetInfo() = default;
virtual ~SelectionDAGTargetInfo();
/// Emit target-specific code that performs a memcpy.
/// This can be used by targets to provide code sequences for cases
@ -45,14 +45,10 @@ public:
/// expanded in a place where calls are not feasible (e.g. within the prologue
/// for another call). If the target chooses to decline an AlwaysInline
/// request here, legalize will resort to using simple loads and stores.
virtual SDValue
EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile,
bool AlwaysInline,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const {
virtual SDValue EmitTargetCodeForMemcpy(
SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline,
MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
return SDValue();
}
@ -62,13 +58,10 @@ public:
/// more efficient than using a library call. This function can return a null
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
virtual SDValue
EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const {
virtual SDValue EmitTargetCodeForMemmove(
SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
return SDValue();
}
@ -78,12 +71,11 @@ public:
/// efficient than using a library call. This function can return a null
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
virtual SDValue
EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo) const {
virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
SDValue Chain, SDValue Op1,
SDValue Op2, SDValue Op3,
unsigned Align, bool isVolatile,
MachinePointerInfo DstPtrInfo) const {
return SDValue();
}
@ -92,10 +84,9 @@ public:
/// memcmp and the second is the chain. Both SDValues can be null if a normal
/// libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
SDValue Op3, MachinePointerInfo Op1PtrInfo,
EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc dl, SDValue Chain,
SDValue Op1, SDValue Op2, SDValue Op3,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
@ -121,8 +112,7 @@ public:
EmitTargetCodeForStrcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Dest, SDValue Src,
MachinePointerInfo DestPtrInfo,
MachinePointerInfo SrcPtrInfo,
bool isStpcpy) const {
MachinePointerInfo SrcPtrInfo, bool isStpcpy) const {
return std::make_pair(SDValue(), SDValue());
}
@ -130,12 +120,9 @@ public:
/// faster than a libcall.
/// The first returned SDValue is the result of the strcmp and the second is
/// the chain. Both SDValues can be null if a normal libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc dl,
SDValue Chain,
SDValue Op1, SDValue Op2,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
virtual std::pair<SDValue, SDValue> EmitTargetCodeForStrcmp(
SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2,
MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}

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@ -45,7 +45,6 @@ class TargetIntrinsicInfo;
class TargetLowering;
class TargetPassConfig;
class TargetRegisterInfo;
class TargetSelectionDAGInfo;
class TargetSubtargetInfo;
class TargetTransformInfo;
class formatted_raw_ostream;

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@ -32,7 +32,7 @@ class TargetLowering;
class TargetRegisterClass;
class TargetRegisterInfo;
class TargetSchedModel;
class TargetSelectionDAGInfo;
class SelectionDAGTargetInfo;
struct MachineSchedPolicy;
template <typename T> class SmallVectorImpl;
@ -79,7 +79,7 @@ public:
return nullptr;
}
virtual const TargetLowering *getTargetLowering() const { return nullptr; }
virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const {
virtual const SelectionDAGTargetInfo *getSelectionDAGInfo() const {
return nullptr;
}
/// Target can subclass this hook to select a different DAG scheduler.

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@ -14,15 +14,15 @@ add_llvm_library(LLVMSelectionDAG
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp
SelectionDAG.cpp
ScheduleDAGVLIW.cpp
SelectionDAGBuilder.cpp
SelectionDAG.cpp
SelectionDAGDumper.cpp
SelectionDAGISel.cpp
SelectionDAGPrinter.cpp
SelectionDAGTargetInfo.cpp
StatepointLowering.cpp
ScheduleDAGVLIW.cpp
TargetLowering.cpp
TargetSelectionDAGInfo.cpp
)
add_dependencies(LLVMSelectionDAG intrinsics_gen)

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@ -24,6 +24,7 @@
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
@ -46,7 +47,6 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <algorithm>
#include <cmath>

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@ -34,6 +34,7 @@
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
#include "llvm/IR/CallingConv.h"
@ -62,7 +63,6 @@
#include "llvm/Target/TargetIntrinsicInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <algorithm>
#include <utility>
@ -5517,7 +5517,7 @@ bool SelectionDAGBuilder::visitMemCmpCall(const CallInst &I) {
return true;
}
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForMemcmp(DAG, getCurSDLoc(), DAG.getRoot(),
getValue(LHS), getValue(RHS), getValue(Size),
@ -5614,7 +5614,7 @@ bool SelectionDAGBuilder::visitMemChrCall(const CallInst &I) {
!I.getType()->isPointerTy())
return false;
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForMemchr(DAG, getCurSDLoc(), DAG.getRoot(),
getValue(Src), getValue(Char), getValue(Length),
@ -5642,7 +5642,7 @@ bool SelectionDAGBuilder::visitStrCpyCall(const CallInst &I, bool isStpcpy) {
!I.getType()->isPointerTy())
return false;
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForStrcpy(DAG, getCurSDLoc(), getRoot(),
getValue(Arg0), getValue(Arg1),
@ -5671,7 +5671,7 @@ bool SelectionDAGBuilder::visitStrCmpCall(const CallInst &I) {
!I.getType()->isIntegerTy())
return false;
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForStrcmp(DAG, getCurSDLoc(), DAG.getRoot(),
getValue(Arg0), getValue(Arg1),
@ -5698,7 +5698,7 @@ bool SelectionDAGBuilder::visitStrLenCall(const CallInst &I) {
if (!Arg0->getType()->isPointerTy() || !I.getType()->isIntegerTy())
return false;
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForStrlen(DAG, getCurSDLoc(), DAG.getRoot(),
getValue(Arg0), MachinePointerInfo(Arg0));
@ -5725,7 +5725,7 @@ bool SelectionDAGBuilder::visitStrNLenCall(const CallInst &I) {
!I.getType()->isIntegerTy())
return false;
const TargetSelectionDAGInfo &TSI = DAG.getSelectionDAGInfo();
const SelectionDAGTargetInfo &TSI = DAG.getSelectionDAGInfo();
std::pair<SDValue, SDValue> Res =
TSI.EmitTargetCodeForStrnlen(DAG, getCurSDLoc(), DAG.getRoot(),
getValue(Arg0), getValue(Arg1),

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@ -1,4 +1,4 @@
//===-- TargetSelectionDAGInfo.cpp - SelectionDAG Info --------------------===//
//===-- SelectionDAGTargetInfo.cpp - SelectionDAG Info --------------------===//
//
// The LLVM Compiler Infrastructure
//
@ -7,13 +7,11 @@
//
//===----------------------------------------------------------------------===//
//
// This implements the TargetSelectionDAGInfo class.
// This implements the SelectionDAGTargetInfo class.
//
//===----------------------------------------------------------------------===//
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
using namespace llvm;
TargetSelectionDAGInfo::~TargetSelectionDAGInfo() {
}
SelectionDAGTargetInfo::~SelectionDAGTargetInfo() {}

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@ -7,18 +7,18 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the AArch64 subclass for TargetSelectionDAGInfo.
// This file defines the AArch64 subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_AARCH64_AARCH64SELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
class AArch64SelectionDAGInfo : public TargetSelectionDAGInfo {
class AArch64SelectionDAGInfo : public SelectionDAGTargetInfo {
public:
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain,

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@ -7,7 +7,7 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the ARM subclass for TargetSelectionDAGInfo.
// This file defines the ARM subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
@ -15,7 +15,7 @@
#define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
@ -35,7 +35,7 @@ namespace ARM_AM {
}
} // end namespace ARM_AM
class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
class ARMSelectionDAGInfo : public SelectionDAGTargetInfo {
public:
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,

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@ -7,20 +7,20 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the AVR subclass for TargetSelectionDAGInfo.
// This file defines the AVR subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_AVR_SELECTION_DAG_INFO_H
#define LLVM_AVR_SELECTION_DAG_INFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
/**
* Holds information about the AVR instruction selection DAG.
*/
class AVRSelectionDAGInfo : public TargetSelectionDAGInfo {
class AVRSelectionDAGInfo : public SelectionDAGTargetInfo {
public:
};

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@ -17,7 +17,7 @@
#include "BPFFrameLowering.h"
#include "BPFISelLowering.h"
#include "BPFInstrInfo.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
@ -33,7 +33,7 @@ class BPFSubtarget : public BPFGenSubtargetInfo {
BPFInstrInfo InstrInfo;
BPFFrameLowering FrameLowering;
BPFTargetLowering TLInfo;
TargetSelectionDAGInfo TSInfo;
SelectionDAGTargetInfo TSInfo;
public:
// This constructor initializes the data members to match that
@ -52,7 +52,7 @@ public:
const BPFTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
const TargetRegisterInfo *getRegisterInfo() const override {

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@ -7,18 +7,18 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the Hexagon subclass for TargetSelectionDAGInfo.
// This file defines the Hexagon subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONSELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_HEXAGON_HEXAGONSELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
class HexagonSelectionDAGInfo : public TargetSelectionDAGInfo {
class HexagonSelectionDAGInfo : public SelectionDAGTargetInfo {
public:
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,

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@ -18,8 +18,8 @@
#include "MSP430ISelLowering.h"
#include "MSP430InstrInfo.h"
#include "MSP430RegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -35,7 +35,7 @@ class MSP430Subtarget : public MSP430GenSubtargetInfo {
MSP430FrameLowering FrameLowering;
MSP430InstrInfo InstrInfo;
MSP430TargetLowering TLInfo;
TargetSelectionDAGInfo TSInfo;
SelectionDAGTargetInfo TSInfo;
public:
/// This constructor initializes the data members to match that
@ -60,7 +60,7 @@ public:
const MSP430TargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
};

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@ -18,10 +18,10 @@
#include "MipsFrameLowering.h"
#include "MipsISelLowering.h"
#include "MipsInstrInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -152,7 +152,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
Triple TargetTriple;
const TargetSelectionDAGInfo TSInfo;
const SelectionDAGTargetInfo TSInfo;
std::unique_ptr<const MipsInstrInfo> InstrInfo;
std::unique_ptr<const MipsFrameLowering> FrameLowering;
std::unique_ptr<const MipsTargetLowering> TLInfo;
@ -290,7 +290,7 @@ public:
void setHelperClassesMips16();
void setHelperClassesMipsSE();
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
const MipsInstrInfo *getInstrInfo() const override { return InstrInfo.get(); }

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@ -19,8 +19,8 @@
#include "NVPTXISelLowering.h"
#include "NVPTXInstrInfo.h"
#include "NVPTXRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -42,7 +42,7 @@ class NVPTXSubtarget : public NVPTXGenSubtargetInfo {
const NVPTXTargetMachine &TM;
NVPTXInstrInfo InstrInfo;
NVPTXTargetLowering TLInfo;
TargetSelectionDAGInfo TSInfo;
SelectionDAGTargetInfo TSInfo;
// NVPTX does not have any call stack frame, but need a NVPTX specific
// FrameLowering class because TargetFrameLowering is abstract.
@ -65,7 +65,7 @@ public:
const NVPTXTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}

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@ -16,9 +16,9 @@
#include "ManagedStringPool.h"
#include "NVPTXSubtarget.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
namespace llvm {

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@ -18,9 +18,9 @@
#include "PPCISelLowering.h"
#include "PPCInstrInfo.h"
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -132,7 +132,7 @@ protected:
PPCFrameLowering FrameLowering;
PPCInstrInfo InstrInfo;
PPCTargetLowering TLInfo;
TargetSelectionDAGInfo TSInfo;
SelectionDAGTargetInfo TSInfo;
public:
/// This constructor initializes the data members to match that
@ -167,7 +167,7 @@ public:
const PPCTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
const PPCRegisterInfo *getRegisterInfo() const override {

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@ -15,11 +15,11 @@
#define LLVM_LIB_TARGET_SPARC_SPARCSUBTARGET_H
#include "SparcFrameLowering.h"
#include "SparcInstrInfo.h"
#include "SparcISelLowering.h"
#include "SparcInstrInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Target/TargetFrameLowering.h"
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <string>
@ -39,7 +39,7 @@ class SparcSubtarget : public SparcGenSubtargetInfo {
bool UsePopc;
SparcInstrInfo InstrInfo;
SparcTargetLowering TLInfo;
TargetSelectionDAGInfo TSInfo;
SelectionDAGTargetInfo TSInfo;
SparcFrameLowering FrameLowering;
public:
@ -56,7 +56,7 @@ public:
const SparcTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}

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@ -7,20 +7,20 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the SystemZ subclass for TargetSelectionDAGInfo.
// This file defines the SystemZ subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
class SystemZTargetMachine;
class SystemZSelectionDAGInfo : public TargetSelectionDAGInfo {
class SystemZSelectionDAGInfo : public SelectionDAGTargetInfo {
public:
explicit SystemZSelectionDAGInfo() = default;

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@ -69,7 +69,7 @@ public:
const SystemZTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}

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@ -9,18 +9,18 @@
///
/// \file
/// \brief This file defines the WebAssembly subclass for
/// TargetSelectionDAGInfo.
/// SelectionDAGTargetInfo.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYSELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
class WebAssemblySelectionDAGInfo final : public TargetSelectionDAGInfo {
class WebAssemblySelectionDAGInfo final : public SelectionDAGTargetInfo {
public:
~WebAssemblySelectionDAGInfo() override;
};

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@ -7,14 +7,14 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the X86 subclass for TargetSelectionDAGInfo.
// This file defines the X86 subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
@ -22,7 +22,7 @@ class X86TargetLowering;
class X86TargetMachine;
class X86Subtarget;
class X86SelectionDAGInfo : public TargetSelectionDAGInfo {
class X86SelectionDAGInfo : public SelectionDAGTargetInfo {
/// Returns true if it is possible for the base register to conflict with the
/// given set of clobbers for a memory intrinsic.
bool isBaseRegConflictPossible(SelectionDAG &DAG,

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@ -7,20 +7,20 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the XCore subclass for TargetSelectionDAGInfo.
// This file defines the XCore subclass for SelectionDAGTargetInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_XCORE_XCORESELECTIONDAGINFO_H
#define LLVM_LIB_TARGET_XCORE_XCORESELECTIONDAGINFO_H
#include "llvm/Target/TargetSelectionDAGInfo.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
namespace llvm {
class XCoreTargetMachine;
class XCoreSelectionDAGInfo : public TargetSelectionDAGInfo {
class XCoreSelectionDAGInfo : public SelectionDAGTargetInfo {
public:
SDValue