diff --git a/lib/Target/X86/X86CallingConv.td b/lib/Target/X86/X86CallingConv.td index aa97b8b36b1..a6d2709b372 100644 --- a/lib/Target/X86/X86CallingConv.td +++ b/lib/Target/X86/X86CallingConv.td @@ -35,7 +35,7 @@ def RetCC_X86Common : CallingConv<[ CCIfType<[i8] , CCAssignToReg<[AL, DL, CL]>>, CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>, CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>, - CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R11]>>, + CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>, // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3 // can only be used by ABI non-compliant code. If the target doesn't have XMM diff --git a/test/CodeGen/X86/pass-four.ll b/test/CodeGen/X86/pass-four.ll deleted file mode 100644 index fd4e1e98c74..00000000000 --- a/test/CodeGen/X86/pass-four.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s | FileCheck %s -target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin11.3.0" - - -define { i8*, i64, i64*, i64 } @copy_4(i8* %a, i64 %b, i64* %c, i64 %d) nounwind { -entry: - %0 = insertvalue { i8*, i64, i64*, i64 } undef, i8* %a, 0 - %1 = insertvalue { i8*, i64, i64*, i64 } %0, i64 %b, 1 - %2 = insertvalue { i8*, i64, i64*, i64 } %1, i64* %c, 2 - %3 = insertvalue { i8*, i64, i64*, i64 } %2, i64 %d, 3 - ret { i8*, i64, i64*, i64 } %3 -} - -; CHECK: copy_4: -; CHECK-NOT: (%rdi) -; CHECK: ret diff --git a/test/CodeGen/X86/pass-three.ll b/test/CodeGen/X86/pass-three.ll new file mode 100644 index 00000000000..23005c77c13 --- /dev/null +++ b/test/CodeGen/X86/pass-three.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s | FileCheck %s +target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-apple-darwin11.3.0" + + +define { i8*, i64, i64* } @copy_3(i8* %a, i64 %b, i64* %c) nounwind { +entry: + %0 = insertvalue { i8*, i64, i64* } undef, i8* %a, 0 + %1 = insertvalue { i8*, i64, i64* } %0, i64 %b, 1 + %2 = insertvalue { i8*, i64, i64* } %1, i64* %c, 2 + ret { i8*, i64, i64* } %2 +} + +; CHECK: copy_3: +; CHECK-NOT: (%rdi) +; CHECK: ret