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[InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary: If we have the code like this: ``` float a, b; a = std::max(a ,b); ``` it is converted into something like this: ``` %call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr) %1 = bitcast float* %call to i32* %2 = load i32, i32* %1, align 4 %3 = bitcast float* %a.addr to i32* store i32 %2, i32* %3, align 4 ``` After inlinning this code is converted to the next: ``` %1 = load float, float* %a.addr %2 = load float, float* %b.addr %cmp.i = fcmp fast olt float %1, %2 %__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr %3 = bitcast float* %__b.__a.i to i32* %4 = load i32, i32* %3, align 4 %5 = bitcast float* %arrayidx to i32* store i32 %4, i32* %5, align 4 ``` This pattern is not recognized as minmax pattern. Patch solves this problem by converting sequence ``` store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2)))) ``` to a sequence ``` store (,load (select((cmp V1, V2), &V1, &V2))) ``` After this the code is recognized as minmax pattern. Reviewers: RKSimon, spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D40304 llvm-svn: 320157
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@ -22,9 +22,11 @@
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/MDBuilder.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include "llvm/Transforms/Utils/Local.h"
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using namespace llvm;
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using namespace PatternMatch;
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#define DEBUG_TYPE "instcombine"
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@ -561,6 +563,28 @@ static StoreInst *combineStoreToNewValue(InstCombiner &IC, StoreInst &SI, Value
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return NewStore;
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}
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/// Returns true if instruction represent minmax pattern like:
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/// select ((cmp load V1, load V2), V1, V2).
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static bool isMinMaxWithLoads(Value *V) {
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assert(V->getType()->isPointerTy() && "Expected pointer type.");
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// Ignore possible ty* to ixx* bitcast.
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V = peekThroughBitcast(V);
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// Check that select is select ((cmp load V1, load V2), V1, V2) - minmax
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// pattern.
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CmpInst::Predicate Pred;
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Instruction *L1;
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Instruction *L2;
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Value *LHS;
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Value *RHS;
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if (!match(V, m_Select(m_Cmp(Pred, m_Instruction(L1), m_Instruction(L2)),
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m_Value(LHS), m_Value(RHS))))
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return false;
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return (match(L1, m_Load(m_Specific(LHS))) &&
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match(L2, m_Load(m_Specific(RHS)))) ||
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(match(L1, m_Load(m_Specific(RHS))) &&
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match(L2, m_Load(m_Specific(LHS))));
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}
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/// \brief Combine loads to match the type of their uses' value after looking
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/// through intervening bitcasts.
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///
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@ -598,10 +622,14 @@ static Instruction *combineLoadToOperationType(InstCombiner &IC, LoadInst &LI) {
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// integers instead of any other type. We only do this when the loaded type
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// is sized and has a size exactly the same as its store size and the store
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// size is a legal integer type.
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// Do not perform canonicalization if minmax pattern is found (to avoid
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// infinite loop).
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if (!Ty->isIntegerTy() && Ty->isSized() &&
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DL.isLegalInteger(DL.getTypeStoreSizeInBits(Ty)) &&
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DL.getTypeStoreSizeInBits(Ty) == DL.getTypeSizeInBits(Ty) &&
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!DL.isNonIntegralPointerType(Ty)) {
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!DL.isNonIntegralPointerType(Ty) &&
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!isMinMaxWithLoads(
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peekThroughBitcast(LI.getPointerOperand(), /*OneUseOnly=*/true))) {
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if (all_of(LI.users(), [&LI](User *U) {
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auto *SI = dyn_cast<StoreInst>(U);
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return SI && SI->getPointerOperand() != &LI &&
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@ -1298,6 +1326,30 @@ static bool equivalentAddressValues(Value *A, Value *B) {
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return false;
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}
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/// Converts store (bitcast (load (bitcast (select ...)))) to
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/// store (load (select ...)), where select is minmax:
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/// select ((cmp load V1, load V2), V1, V2).
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bool removeBitcastsFromLoadStoreOnMinMax(InstCombiner &IC, StoreInst &SI) {
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// bitcast?
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Value *StoreAddr;
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if (!match(SI.getPointerOperand(), m_BitCast(m_Value(StoreAddr))))
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return false;
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// load? integer?
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Value *LoadAddr;
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if (!match(SI.getValueOperand(), m_Load(m_BitCast(m_Value(LoadAddr)))))
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return false;
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auto *LI = cast<LoadInst>(SI.getValueOperand());
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if (!LI->getType()->isIntegerTy())
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return false;
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if (!isMinMaxWithLoads(LoadAddr))
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return false;
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LoadInst *NewLI = combineLoadToNewType(
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IC, *LI, LoadAddr->getType()->getPointerElementType());
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combineStoreToNewValue(IC, SI, NewLI);
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return true;
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}
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Instruction *InstCombiner::visitStoreInst(StoreInst &SI) {
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Value *Val = SI.getOperand(0);
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Value *Ptr = SI.getOperand(1);
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@ -1322,6 +1374,9 @@ Instruction *InstCombiner::visitStoreInst(StoreInst &SI) {
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if (unpackStoreToAggregate(*this, SI))
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return eraseInstFromFunction(SI);
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if (removeBitcastsFromLoadStoreOnMinMax(*this, SI))
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return eraseInstFromFunction(SI);
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// Replace GEP indices if possible.
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if (Instruction *NewGEPI = replaceGEPIdxWithZero(*this, Ptr, SI)) {
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Worklist.Add(NewGEPI);
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@ -21,11 +21,8 @@ define void @_Z3foov() {
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; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[ARRAYIDX2]], align 4
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; CHECK-NEXT: [[CMP_I:%.*]] = fcmp fast olt float [[TMP1]], [[TMP2]]
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; CHECK-NEXT: [[__B___A_I:%.*]] = select i1 [[CMP_I]], float* [[ARRAYIDX2]], float* [[ARRAYIDX]]
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; CHECK-NEXT: [[TMP3:%.*]] = bitcast float* [[__B___A_I]] to i32*
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; CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast float* [[ARRAYIDX]] to i32*
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; CHECK-NEXT: store i32 [[TMP4]], i32* [[TMP5]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[CMP_I]], float [[TMP2]], float [[TMP1]]
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; CHECK-NEXT: store float [[TMP3]], float* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[I_0]], 1
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; CHECK-NEXT: br label [[FOR_COND]]
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;
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@ -91,11 +88,8 @@ define void @bitcasted_minmax_with_select_of_pointers(float* %loadaddr1, float*
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; CHECK-NEXT: [[LD1:%.*]] = load float, float* [[LOADADDR1:%.*]], align 4
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; CHECK-NEXT: [[LD2:%.*]] = load float, float* [[LOADADDR2:%.*]], align 4
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; CHECK-NEXT: [[COND:%.*]] = fcmp ogt float [[LD1]], [[LD2]]
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; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], float* [[LOADADDR1]], float* [[LOADADDR2]]
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; CHECK-NEXT: [[INT_LOAD_ADDR:%.*]] = bitcast float* [[SEL]] to i32*
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[INT_LOAD_ADDR]], align 4
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; CHECK-NEXT: [[INT_STORE_ADDR:%.*]] = bitcast float* [[STOREADDR:%.*]] to i32*
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; CHECK-NEXT: store i32 [[LD]], i32* [[INT_STORE_ADDR]], align 4
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; CHECK-NEXT: [[LD3:%.*]] = select i1 [[COND]], float [[LD1]], float [[LD2]]
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; CHECK-NEXT: store float [[LD3]], float* [[STOREADDR:%.*]], align 4
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; CHECK-NEXT: ret void
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;
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%ld1 = load float, float* %loadaddr1, align 4
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