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[X86][SSE] Add more thorough extract to store tests
Added v4i32 and v2i64 tests and test on i686 as well as x86_64. llvm-svn: 294946
This commit is contained in:
Simon Pilgrim
parent
a7843cefbb
commit
1d9efbab01
@ -1,116 +1,412 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32 --check-prefix=SSE-X32 --check-prefix=SSE2-X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE2-X64
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32 --check-prefix=SSE-X32 --check-prefix=SSE41-X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64 --check-prefix=SSE-X64 --check-prefix=SSE41-X64
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=AVX-X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=AVX-X64
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define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) {
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; SSE2-LABEL: extract_i8_0:
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; SSE2: # BB#0:
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; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; SSE2-NEXT: movb %al, (%rdi)
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; SSE2-NEXT: retq
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define void @extract_i8_0(i8* nocapture %dst, <16 x i8> %foo) nounwind {
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; SSE2-X32-LABEL: extract_i8_0:
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; SSE2-X32: # BB#0:
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; SSE2-X32-NEXT: pushl %ebp
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; SSE2-X32-NEXT: movl %esp, %ebp
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; SSE2-X32-NEXT: andl $-16, %esp
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; SSE2-X32-NEXT: subl $32, %esp
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; SSE2-X32-NEXT: movl 8(%ebp), %eax
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; SSE2-X32-NEXT: movaps %xmm0, (%esp)
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; SSE2-X32-NEXT: movb (%esp), %cl
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; SSE2-X32-NEXT: movb %cl, (%eax)
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; SSE2-X32-NEXT: movl %ebp, %esp
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; SSE2-X32-NEXT: popl %ebp
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; SSE2-X32-NEXT: retl
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;
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; SSE41-LABEL: extract_i8_0:
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; SSE41: # BB#0:
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; SSE41-NEXT: pextrb $0, %xmm0, (%rdi)
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; SSE41-NEXT: retq
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; SSE2-X64-LABEL: extract_i8_0:
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; SSE2-X64: # BB#0:
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; SSE2-X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; SSE2-X64-NEXT: movb %al, (%rdi)
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; SSE2-X64-NEXT: retq
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;
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; AVX-LABEL: extract_i8_0:
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; AVX: # BB#0:
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; AVX-NEXT: vpextrb $0, %xmm0, (%rdi)
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; AVX-NEXT: retq
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; SSE41-X32-LABEL: extract_i8_0:
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; SSE41-X32: # BB#0:
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; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE41-X32-NEXT: pextrb $0, %xmm0, (%eax)
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; SSE41-X32-NEXT: retl
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;
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; SSE41-X64-LABEL: extract_i8_0:
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; SSE41-X64: # BB#0:
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; SSE41-X64-NEXT: pextrb $0, %xmm0, (%rdi)
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; SSE41-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i8_0:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vpextrb $0, %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i8_0:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vpextrb $0, %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <16 x i8> %foo, i32 0
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store i8 %vecext, i8* %dst, align 1
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ret void
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}
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define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) {
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; SSE2-LABEL: extract_i8_15:
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; SSE2: # BB#0:
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; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; SSE2-NEXT: movb %al, (%rdi)
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; SSE2-NEXT: retq
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define void @extract_i8_3(i8* nocapture %dst, <16 x i8> %foo) nounwind {
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; SSE2-X32-LABEL: extract_i8_3:
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; SSE2-X32: # BB#0:
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; SSE2-X32-NEXT: pushl %ebp
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; SSE2-X32-NEXT: movl %esp, %ebp
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; SSE2-X32-NEXT: andl $-16, %esp
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; SSE2-X32-NEXT: subl $32, %esp
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; SSE2-X32-NEXT: movl 8(%ebp), %eax
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; SSE2-X32-NEXT: movaps %xmm0, (%esp)
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; SSE2-X32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; SSE2-X32-NEXT: movb %cl, (%eax)
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; SSE2-X32-NEXT: movl %ebp, %esp
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; SSE2-X32-NEXT: popl %ebp
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; SSE2-X32-NEXT: retl
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;
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; SSE41-LABEL: extract_i8_15:
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; SSE41: # BB#0:
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; SSE41-NEXT: pextrb $15, %xmm0, (%rdi)
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; SSE41-NEXT: retq
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; SSE2-X64-LABEL: extract_i8_3:
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; SSE2-X64: # BB#0:
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; SSE2-X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; SSE2-X64-NEXT: movb %al, (%rdi)
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; SSE2-X64-NEXT: retq
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;
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; AVX-LABEL: extract_i8_15:
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; AVX: # BB#0:
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; AVX-NEXT: vpextrb $15, %xmm0, (%rdi)
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; AVX-NEXT: retq
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; SSE41-X32-LABEL: extract_i8_3:
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; SSE41-X32: # BB#0:
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; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE41-X32-NEXT: pextrb $3, %xmm0, (%eax)
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; SSE41-X32-NEXT: retl
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;
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; SSE41-X64-LABEL: extract_i8_3:
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; SSE41-X64: # BB#0:
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; SSE41-X64-NEXT: pextrb $3, %xmm0, (%rdi)
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; SSE41-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i8_3:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vpextrb $3, %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i8_3:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vpextrb $3, %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <16 x i8> %foo, i32 3
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store i8 %vecext, i8* %dst, align 1
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ret void
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}
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define void @extract_i8_15(i8* nocapture %dst, <16 x i8> %foo) nounwind {
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; SSE2-X32-LABEL: extract_i8_15:
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; SSE2-X32: # BB#0:
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; SSE2-X32-NEXT: pushl %ebp
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; SSE2-X32-NEXT: movl %esp, %ebp
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; SSE2-X32-NEXT: andl $-16, %esp
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; SSE2-X32-NEXT: subl $32, %esp
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; SSE2-X32-NEXT: movl 8(%ebp), %eax
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; SSE2-X32-NEXT: movaps %xmm0, (%esp)
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; SSE2-X32-NEXT: movb {{[0-9]+}}(%esp), %cl
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; SSE2-X32-NEXT: movb %cl, (%eax)
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; SSE2-X32-NEXT: movl %ebp, %esp
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; SSE2-X32-NEXT: popl %ebp
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; SSE2-X32-NEXT: retl
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;
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; SSE2-X64-LABEL: extract_i8_15:
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; SSE2-X64: # BB#0:
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; SSE2-X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; SSE2-X64-NEXT: movb -{{[0-9]+}}(%rsp), %al
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; SSE2-X64-NEXT: movb %al, (%rdi)
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; SSE2-X64-NEXT: retq
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;
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; SSE41-X32-LABEL: extract_i8_15:
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; SSE41-X32: # BB#0:
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; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE41-X32-NEXT: pextrb $15, %xmm0, (%eax)
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; SSE41-X32-NEXT: retl
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;
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; SSE41-X64-LABEL: extract_i8_15:
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; SSE41-X64: # BB#0:
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; SSE41-X64-NEXT: pextrb $15, %xmm0, (%rdi)
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; SSE41-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i8_15:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vpextrb $15, %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i8_15:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vpextrb $15, %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <16 x i8> %foo, i32 15
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store i8 %vecext, i8* %dst, align 1
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ret void
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}
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define void @extract_i16_0(i16* nocapture %dst, <8 x i16> %foo) {
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; SSE2-LABEL: extract_i16_0:
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; SSE2: # BB#0:
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; SSE2-NEXT: movd %xmm0, %eax
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; SSE2-NEXT: movw %ax, (%rdi)
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; SSE2-NEXT: retq
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define void @extract_i16_0(i16* nocapture %dst, <8 x i16> %foo) nounwind {
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; SSE2-X32-LABEL: extract_i16_0:
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; SSE2-X32: # BB#0:
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; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE2-X32-NEXT: movd %xmm0, %ecx
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; SSE2-X32-NEXT: movw %cx, (%eax)
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; SSE2-X32-NEXT: retl
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;
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; SSE41-LABEL: extract_i16_0:
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; SSE41: # BB#0:
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; SSE41-NEXT: pextrw $0, %xmm0, (%rdi)
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; SSE41-NEXT: retq
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; SSE2-X64-LABEL: extract_i16_0:
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; SSE2-X64: # BB#0:
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; SSE2-X64-NEXT: movd %xmm0, %eax
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; SSE2-X64-NEXT: movw %ax, (%rdi)
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; SSE2-X64-NEXT: retq
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;
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; AVX-LABEL: extract_i16_0:
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; AVX: # BB#0:
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; AVX-NEXT: vpextrw $0, %xmm0, (%rdi)
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; AVX-NEXT: retq
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; SSE41-X32-LABEL: extract_i16_0:
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; SSE41-X32: # BB#0:
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; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE41-X32-NEXT: pextrw $0, %xmm0, (%eax)
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; SSE41-X32-NEXT: retl
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;
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; SSE41-X64-LABEL: extract_i16_0:
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; SSE41-X64: # BB#0:
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; SSE41-X64-NEXT: pextrw $0, %xmm0, (%rdi)
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; SSE41-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i16_0:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vpextrw $0, %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i16_0:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vpextrw $0, %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <8 x i16> %foo, i32 0
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store i16 %vecext, i16* %dst, align 1
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ret void
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}
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define void @extract_i16_7(i16* nocapture %dst, <8 x i16> %foo) {
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; SSE2-LABEL: extract_i16_7:
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; SSE2: # BB#0:
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; SSE2-NEXT: pextrw $7, %xmm0, %eax
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; SSE2-NEXT: movw %ax, (%rdi)
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; SSE2-NEXT: retq
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define void @extract_i16_7(i16* nocapture %dst, <8 x i16> %foo) nounwind {
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; SSE2-X32-LABEL: extract_i16_7:
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; SSE2-X32: # BB#0:
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; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE2-X32-NEXT: pextrw $7, %xmm0, %ecx
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; SSE2-X32-NEXT: movw %cx, (%eax)
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; SSE2-X32-NEXT: retl
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;
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; SSE41-LABEL: extract_i16_7:
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; SSE41: # BB#0:
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; SSE41-NEXT: pextrw $7, %xmm0, (%rdi)
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; SSE41-NEXT: retq
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; SSE2-X64-LABEL: extract_i16_7:
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; SSE2-X64: # BB#0:
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; SSE2-X64-NEXT: pextrw $7, %xmm0, %eax
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; SSE2-X64-NEXT: movw %ax, (%rdi)
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; SSE2-X64-NEXT: retq
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;
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; AVX-LABEL: extract_i16_7:
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; AVX: # BB#0:
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; AVX-NEXT: vpextrw $7, %xmm0, (%rdi)
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; AVX-NEXT: retq
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; SSE41-X32-LABEL: extract_i16_7:
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; SSE41-X32: # BB#0:
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; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE41-X32-NEXT: pextrw $7, %xmm0, (%eax)
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; SSE41-X32-NEXT: retl
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;
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; SSE41-X64-LABEL: extract_i16_7:
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; SSE41-X64: # BB#0:
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; SSE41-X64-NEXT: pextrw $7, %xmm0, (%rdi)
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; SSE41-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i16_7:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vpextrw $7, %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i16_7:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vpextrw $7, %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <8 x i16> %foo, i32 7
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store i16 %vecext, i16* %dst, align 1
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ret void
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}
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define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) {
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; SSE-LABEL: extract_i8_undef:
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; SSE: # BB#0:
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; SSE-NEXT: retq
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define void @extract_i32_0(i32* nocapture %dst, <4 x i32> %foo) nounwind {
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; SSE-X32-LABEL: extract_i32_0:
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; SSE-X32: # BB#0:
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; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SSE-X32-NEXT: movss %xmm0, (%eax)
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; SSE-X32-NEXT: retl
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;
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; AVX-LABEL: extract_i8_undef:
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; AVX: # BB#0:
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; AVX-NEXT: retq
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; SSE-X64-LABEL: extract_i32_0:
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; SSE-X64: # BB#0:
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; SSE-X64-NEXT: movss %xmm0, (%rdi)
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; SSE-X64-NEXT: retq
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;
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; AVX-X32-LABEL: extract_i32_0:
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; AVX-X32: # BB#0:
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; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-X32-NEXT: vmovss %xmm0, (%eax)
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; AVX-X32-NEXT: retl
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;
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; AVX-X64-LABEL: extract_i32_0:
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; AVX-X64: # BB#0:
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; AVX-X64-NEXT: vmovss %xmm0, (%rdi)
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; AVX-X64-NEXT: retq
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%vecext = extractelement <4 x i32> %foo, i32 0
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store i32 %vecext, i32* %dst, align 1
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ret void
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}
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|
||||
define void @extract_i32_3(i32* nocapture %dst, <4 x i32> %foo) nounwind {
|
||||
; SSE2-X32-LABEL: extract_i32_3:
|
||||
; SSE2-X32: # BB#0:
|
||||
; SSE2-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; SSE2-X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
|
||||
; SSE2-X32-NEXT: movd %xmm0, (%eax)
|
||||
; SSE2-X32-NEXT: retl
|
||||
;
|
||||
; SSE2-X64-LABEL: extract_i32_3:
|
||||
; SSE2-X64: # BB#0:
|
||||
; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
|
||||
; SSE2-X64-NEXT: movd %xmm0, (%rdi)
|
||||
; SSE2-X64-NEXT: retq
|
||||
;
|
||||
; SSE41-X32-LABEL: extract_i32_3:
|
||||
; SSE41-X32: # BB#0:
|
||||
; SSE41-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; SSE41-X32-NEXT: pextrd $3, %xmm0, (%eax)
|
||||
; SSE41-X32-NEXT: retl
|
||||
;
|
||||
; SSE41-X64-LABEL: extract_i32_3:
|
||||
; SSE41-X64: # BB#0:
|
||||
; SSE41-X64-NEXT: pextrd $3, %xmm0, (%rdi)
|
||||
; SSE41-X64-NEXT: retq
|
||||
;
|
||||
; AVX-X32-LABEL: extract_i32_3:
|
||||
; AVX-X32: # BB#0:
|
||||
; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; AVX-X32-NEXT: vpextrd $3, %xmm0, (%eax)
|
||||
; AVX-X32-NEXT: retl
|
||||
;
|
||||
; AVX-X64-LABEL: extract_i32_3:
|
||||
; AVX-X64: # BB#0:
|
||||
; AVX-X64-NEXT: vpextrd $3, %xmm0, (%rdi)
|
||||
; AVX-X64-NEXT: retq
|
||||
%vecext = extractelement <4 x i32> %foo, i32 3
|
||||
store i32 %vecext, i32* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i64_0(i64* nocapture %dst, <2 x i64> %foo) nounwind {
|
||||
; SSE-X32-LABEL: extract_i64_0:
|
||||
; SSE-X32: # BB#0:
|
||||
; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; SSE-X32-NEXT: movlps %xmm0, (%eax)
|
||||
; SSE-X32-NEXT: retl
|
||||
;
|
||||
; SSE-X64-LABEL: extract_i64_0:
|
||||
; SSE-X64: # BB#0:
|
||||
; SSE-X64-NEXT: movlps %xmm0, (%rdi)
|
||||
; SSE-X64-NEXT: retq
|
||||
;
|
||||
; AVX-X32-LABEL: extract_i64_0:
|
||||
; AVX-X32: # BB#0:
|
||||
; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; AVX-X32-NEXT: vmovlps %xmm0, (%eax)
|
||||
; AVX-X32-NEXT: retl
|
||||
;
|
||||
; AVX-X64-LABEL: extract_i64_0:
|
||||
; AVX-X64: # BB#0:
|
||||
; AVX-X64-NEXT: vmovlps %xmm0, (%rdi)
|
||||
; AVX-X64-NEXT: retq
|
||||
%vecext = extractelement <2 x i64> %foo, i32 0
|
||||
store i64 %vecext, i64* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i64_1(i64* nocapture %dst, <2 x i64> %foo) nounwind {
|
||||
; SSE-X32-LABEL: extract_i64_1:
|
||||
; SSE-X32: # BB#0:
|
||||
; SSE-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; SSE-X32-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
|
||||
; SSE-X32-NEXT: movq %xmm0, (%eax)
|
||||
; SSE-X32-NEXT: retl
|
||||
;
|
||||
; SSE2-X64-LABEL: extract_i64_1:
|
||||
; SSE2-X64: # BB#0:
|
||||
; SSE2-X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
|
||||
; SSE2-X64-NEXT: movq %xmm0, (%rdi)
|
||||
; SSE2-X64-NEXT: retq
|
||||
;
|
||||
; SSE41-X64-LABEL: extract_i64_1:
|
||||
; SSE41-X64: # BB#0:
|
||||
; SSE41-X64-NEXT: pextrq $1, %xmm0, (%rdi)
|
||||
; SSE41-X64-NEXT: retq
|
||||
;
|
||||
; AVX-X32-LABEL: extract_i64_1:
|
||||
; AVX-X32: # BB#0:
|
||||
; AVX-X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; AVX-X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
|
||||
; AVX-X32-NEXT: vmovq %xmm0, (%eax)
|
||||
; AVX-X32-NEXT: retl
|
||||
;
|
||||
; AVX-X64-LABEL: extract_i64_1:
|
||||
; AVX-X64: # BB#0:
|
||||
; AVX-X64-NEXT: vpextrq $1, %xmm0, (%rdi)
|
||||
; AVX-X64-NEXT: retq
|
||||
%vecext = extractelement <2 x i64> %foo, i32 1
|
||||
store i64 %vecext, i64* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i8_undef(i8* nocapture %dst, <16 x i8> %foo) nounwind {
|
||||
; X32-LABEL: extract_i8_undef:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: extract_i8_undef:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: retq
|
||||
%vecext = extractelement <16 x i8> %foo, i32 16 ; undef
|
||||
store i8 %vecext, i8* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i16_undef(i16* nocapture %dst, <8 x i16> %foo) {
|
||||
; SSE-LABEL: extract_i16_undef:
|
||||
; SSE: # BB#0:
|
||||
; SSE-NEXT: retq
|
||||
define void @extract_i16_undef(i16* nocapture %dst, <8 x i16> %foo) nounwind {
|
||||
; X32-LABEL: extract_i16_undef:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; AVX-LABEL: extract_i16_undef:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: retq
|
||||
; X64-LABEL: extract_i16_undef:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: retq
|
||||
%vecext = extractelement <8 x i16> %foo, i32 9 ; undef
|
||||
store i16 %vecext, i16* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i32_undef(i32* nocapture %dst, <4 x i32> %foo) nounwind {
|
||||
; X32-LABEL: extract_i32_undef:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: extract_i32_undef:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: retq
|
||||
%vecext = extractelement <4 x i32> %foo, i32 6 ; undef
|
||||
store i32 %vecext, i32* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @extract_i64_undef(i64* nocapture %dst, <2 x i64> %foo) nounwind {
|
||||
; X32-LABEL: extract_i64_undef:
|
||||
; X32: # BB#0:
|
||||
; X32-NEXT: retl
|
||||
;
|
||||
; X64-LABEL: extract_i64_undef:
|
||||
; X64: # BB#0:
|
||||
; X64-NEXT: retq
|
||||
%vecext = extractelement <2 x i64> %foo, i32 2 ; undef
|
||||
store i64 %vecext, i64* %dst, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user