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[MIBundles] Move analyzePhysReg out of MIBundleOperands iterator (NFC).

analyzePhysReg does not really fit into the iterator and moving it
makes it easier to change the base iterator.

Reviewers: evandro, t.p.northover, paquette, MatzeB, arsenm, qcolombet

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D70559
This commit is contained in:
Florian Hahn 2019-12-02 20:00:56 +00:00
parent d4dc66b0d7
commit 1de5b61d60
5 changed files with 51 additions and 58 deletions

View File

@ -147,47 +147,6 @@ public:
return OpI - InstrI->operands_begin();
}
/// Information about how a physical register Reg is used by a set of
/// operands.
struct PhysRegInfo {
/// There is a regmask operand indicating Reg is clobbered.
/// \see MachineOperand::CreateRegMask().
bool Clobbered;
/// Reg or one of its aliases is defined. The definition may only cover
/// parts of the register.
bool Defined;
/// Reg or a super-register is defined. The definition covers the full
/// register.
bool FullyDefined;
/// Reg or one of its aliases is read. The register may only be read
/// partially.
bool Read;
/// Reg or a super-register is read. The full register is read.
bool FullyRead;
/// Either:
/// - Reg is FullyDefined and all defs of reg or an overlapping
/// register are dead, or
/// - Reg is completely dead because "defined" by a clobber.
bool DeadDef;
/// Reg is Defined and all defs of reg or an overlapping register are
/// dead.
bool PartialDeadDef;
/// There is a use operand of reg or a super-register with kill flag set.
bool Killed;
};
/// analyzePhysReg - Analyze how the current instruction or bundle uses a
/// physical register. This function should not be called after operator++(),
/// it expects a fresh iterator.
///
/// @param Reg The physical register to analyze.
/// @returns A filled-in PhysRegInfo struct.
PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI);
};
/// MIOperands - Iterate over operands of a single instruction.
@ -259,6 +218,49 @@ VirtRegInfo AnalyzeVirtRegInBundle(
MachineInstr &MI, unsigned Reg,
SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
/// Information about how a physical register Reg is used by a set of
/// operands.
struct PhysRegInfo {
/// There is a regmask operand indicating Reg is clobbered.
/// \see MachineOperand::CreateRegMask().
bool Clobbered;
/// Reg or one of its aliases is defined. The definition may only cover
/// parts of the register.
bool Defined;
/// Reg or a super-register is defined. The definition covers the full
/// register.
bool FullyDefined;
/// Reg or one of its aliases is read. The register may only be read
/// partially.
bool Read;
/// Reg or a super-register is read. The full register is read.
bool FullyRead;
/// Either:
/// - Reg is FullyDefined and all defs of reg or an overlapping
/// register are dead, or
/// - Reg is completely dead because "defined" by a clobber.
bool DeadDef;
/// Reg is Defined and all defs of reg or an overlapping register are
/// dead.
bool PartialDeadDef;
/// There is a use operand of reg or a super-register with kill flag set.
bool Killed;
};
/// AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses
/// a physical register. This function should not be called after operator++(),
/// it expects a fresh iterator.
///
/// @param Reg The physical register to analyze.
/// @returns A filled-in PhysRegInfo struct.
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg,
const TargetRegisterInfo *TRI);
} // End llvm namespace
#endif

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@ -850,8 +850,7 @@ foldMemoryOperand(ArrayRef<std::pair<MachineInstr *, unsigned>> Ops,
// Skip non-Defs, including undef uses and internal reads.
if (MO->isUse())
continue;
MIBundleOperands::PhysRegInfo RI =
MIBundleOperands(*FoldMI).analyzePhysReg(Reg, &TRI);
PhysRegInfo RI = AnalyzePhysRegInBundle(*FoldMI, Reg, &TRI);
if (RI.FullyDefined)
continue;
// FoldMI does not define this physreg. Remove the LI segment.

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@ -1395,8 +1395,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
--N;
MachineOperandIteratorBase::PhysRegInfo Info =
ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI);
// Register is live when we read it here.
if (Info.Read)
@ -1434,8 +1433,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
--N;
MachineOperandIteratorBase::PhysRegInfo Info =
ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI);
// Defs happen after uses so they take precedence if both are present.

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@ -308,20 +308,15 @@ VirtRegInfo llvm::AnalyzeVirtRegInBundle(
return RI;
}
//===----------------------------------------------------------------------===//
// MachineOperand iterator
//===----------------------------------------------------------------------===//
MachineOperandIteratorBase::PhysRegInfo
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
PhysRegInfo llvm::AnalyzePhysRegInBundle(const MachineInstr &MI, unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
PhysRegInfo PRI = {false, false, false, false, false, false, false, false};
assert(Register::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
for (; isValid(); ++*this) {
MachineOperand &MO = deref();
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
const MachineOperand &MO = *O;
if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
PRI.Clobbered = true;

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@ -352,8 +352,7 @@ MachineInstr *SSACCmpConv::findConvertibleCompare(MachineBasicBlock *MBB) {
}
// Check for flag reads and clobbers.
MIOperands::PhysRegInfo PRI =
MIOperands(*I).analyzePhysReg(AArch64::NZCV, TRI);
PhysRegInfo PRI = AnalyzePhysRegInBundle(*I, AArch64::NZCV, TRI);
if (PRI.Read) {
// The ccmp doesn't produce exactly the same flags as the original