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[PowerPC] Try to simplify a Swap if it feeds a Splat
If we have the situation where a Swap feeds a Splat we can sometimes change the index on the Splat and then remove the Swap instruction. Fixed the test case that was failing and recommit after pulling the original commit. Original revision is here: https://reviews.llvm.org/D39009 llvm-svn: 316478
This commit is contained in:
Stefan Pintilie
parent
463fb86f87
commit
1e1dcf2d50
@ -375,6 +375,53 @@ bool PPCMIPeephole::simplifyCode(void) {
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MI.getOperand(2).setImm(NewElem);
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}
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}
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// Splat is fed by a SWAP which is a permute of this form
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// XXPERMDI %VA, %VA, 2
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// Since the splat instruction can use any of the vector elements to do
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// the splat we do not have to rearrange the elements in the vector
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// with a swap before we do the splat. We can simply do the splat from
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// a different index.
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// If the swap has only one use (the splat) then we can completely
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// remove the swap too.
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if (DefOpcode == PPC::XXPERMDI && MI.getOperand(1).isImm()) {
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unsigned SwapRes = DefMI->getOperand(0).getReg();
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unsigned SwapOp1 = DefMI->getOperand(1).getReg();
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unsigned SwapOp2 = DefMI->getOperand(2).getReg();
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unsigned SwapImm = DefMI->getOperand(3).getImm();
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unsigned SplatImm = MI.getOperand(1).getImm();
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// Break if this permute is not a swap.
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if (SwapOp1 != SwapOp2 || SwapImm != 2)
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break;
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unsigned NewElem = 0;
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// Compute the new index to use for the splat.
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if (MI.getOpcode() == PPC::VSPLTB)
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NewElem = (SplatImm + 8) & 0xF;
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else if (MI.getOpcode() == PPC::VSPLTH)
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NewElem = (SplatImm + 4) & 0x7;
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else if (MI.getOpcode() == PPC::XXSPLTW)
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NewElem = (SplatImm + 2) & 0x3;
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else {
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DEBUG(dbgs() << "Unknown splat opcode.");
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DEBUG(MI.dump());
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break;
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}
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if (MRI->hasOneNonDBGUse(SwapRes)) {
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DEBUG(dbgs() << "Removing redundant swap: ");
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DEBUG(DefMI->dump());
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ToErase = DefMI;
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}
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Simplified = true;
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DEBUG(dbgs() << "Changing splat immediate from " << SplatImm <<
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" to " << NewElem << " in instruction: ");
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DEBUG(MI.dump());
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MI.getOperand(1).setImm(NewElem);
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MI.getOperand(2).setReg(SwapOp1);
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}
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break;
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}
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case PPC::XVCVDPSP: {
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@ -16,7 +16,7 @@ entry:
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; CHECK: sldi [[REG1:[0-9]+]], 3, 56
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; CHECK: mtvsrd {{[0-9]+}}, [[REG1]]
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; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
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; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
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; CHECK-LE: vspltb {{[0-9]+}}, {{[0-9]+}}, 7
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}
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; Function Attrs: norecurse nounwind readnone
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@ -28,7 +28,7 @@ entry:
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; CHECK: sldi [[REG1:[0-9]+]], 3, 48
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; CHECK: mtvsrd {{[0-9]+}}, [[REG1]]
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; CHECK-LE: mtvsrd [[REG1:[0-9]+]], 3
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; CHECK-LE: xxswapd {{[0-9]+}}, [[REG1]]
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; CHECK-LE: vsplth {{[0-9]+}}, {{[0-9]+}}, 3
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}
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; Function Attrs: norecurse nounwind readnone
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134
test/CodeGen/PowerPC/ppc64-peephole-swap.ll
Normal file
134
test/CodeGen/PowerPC/ppc64-peephole-swap.ll
Normal file
@ -0,0 +1,134 @@
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-PWR8
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; The strightforward expansion of this code will result in a swap followed by a
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; splat. However, the swap is not needed since in this case the splat is the
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; only use.
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; We want to check that we are not using the swap and that we have indexed the
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; splat to the correct location.
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; 8 Bit Signed Version of the test.
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; Function Attrs: norecurse nounwind readnone
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define <16 x i8> @splat_8_plus(<16 x i8> %v, i8 signext %c) local_unnamed_addr {
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entry:
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%splat.splatinsert.i = insertelement <16 x i8> undef, i8 %c, i32 0
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%splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> undef, <16 x i32> zeroinitializer
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%add = add <16 x i8> %splat.splat.i, %v
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ret <16 x i8> %add
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; CHECK-LABEL: splat_8_plus
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; CHECK-NOT: xxswapd
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; CHECK: vspltb {{[0-9]+}}, {{[0-9]+}}, 7
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_8_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: vspltb {{[0-9]+}}, {{[0-9]+}}, 7
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; CHECK-PWR8: blr
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}
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; 8 Bit Unsigned Version of the test.
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; Function Attrs: norecurse nounwind readnone
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define <16 x i8> @splat_u8_plus(<16 x i8> %v, i8 zeroext %c) local_unnamed_addr {
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entry:
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%splat.splatinsert.i = insertelement <16 x i8> undef, i8 %c, i32 0
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%splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> undef, <16 x i32> zeroinitializer
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%add = add <16 x i8> %splat.splat.i, %v
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ret <16 x i8> %add
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; CHECK-LABEL: splat_u8_plus
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; CHECK-NOT: xxswapd
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; CHECK: vspltb {{[0-9]+}}, {{[0-9]+}}, 7
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_u8_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: vspltb {{[0-9]+}}, {{[0-9]+}}, 7
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; CHECK-PWR8: blr
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}
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; 16 Bit Signed Version of the test.
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; Function Attrs: norecurse nounwind readnone
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define <8 x i16> @splat_16_plus(<8 x i16> %v, i16 signext %c) local_unnamed_addr {
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entry:
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%0 = shl i16 %c, 8
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%conv.i = ashr exact i16 %0, 8
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%splat.splatinsert.i = insertelement <8 x i16> undef, i16 %conv.i, i32 0
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%splat.splat.i = shufflevector <8 x i16> %splat.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer
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%add = add <8 x i16> %splat.splat.i, %v
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ret <8 x i16> %add
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; CHECK-LABEL: splat_16_plus
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; CHECK-NOT: xxswapd
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; CHECK: vsplth {{[0-9]+}}, {{[0-9]+}}, 3
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_16_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: vsplth {{[0-9]+}}, {{[0-9]+}}, 3
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; CHECK-PWR8: blr
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}
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; 16 Bit Unsigned Version of the test.
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; Function Attrs: norecurse nounwind readnone
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define <8 x i16> @splat_u16_plus(<8 x i16> %v, i16 zeroext %c) local_unnamed_addr {
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entry:
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%0 = shl i16 %c, 8
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%conv.i = ashr exact i16 %0, 8
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%splat.splatinsert.i = insertelement <8 x i16> undef, i16 %conv.i, i32 0
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%splat.splat.i = shufflevector <8 x i16> %splat.splatinsert.i, <8 x i16> undef, <8 x i32> zeroinitializer
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%add = add <8 x i16> %splat.splat.i, %v
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ret <8 x i16> %add
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; CHECK-LABEL: splat_u16_plus
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; CHECK-NOT: xxswapd
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; CHECK: vsplth {{[0-9]+}}, {{[0-9]+}}, 3
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_u16_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: vsplth {{[0-9]+}}, {{[0-9]+}}, 3
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; CHECK-PWR8: blr
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}
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; 32 Bit Signed Version of the test.
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; The 32 bit examples work differently than the 8 and 16 bit versions of the
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; test. On Power 9 we have the mtvsrws instruction that does both the move to
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; register and the splat so it does not really test the newly implemented code.
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; On Power 9 for the 32 bit case we don't need the new simplification. It is
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; just here for completeness.
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @splat_32_plus(<4 x i32> %v, i32 signext %c) local_unnamed_addr {
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entry:
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%sext = shl i32 %c, 24
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%conv.i = ashr exact i32 %sext, 24
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%splat.splatinsert.i = insertelement <4 x i32> undef, i32 %conv.i, i32 0
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%splat.splat.i = shufflevector <4 x i32> %splat.splatinsert.i, <4 x i32> undef, <4 x i32> zeroinitializer
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%add = add <4 x i32> %splat.splat.i, %v
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ret <4 x i32> %add
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; CHECK-LABEL: splat_32_plus
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; CHECK-NOT: xxswapd
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; CHECK: mtvsrws {{[0-9]+}}, {{[0-9]+}}
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_32_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: xxspltw {{[0-9]+}}, {{[0-9]+}}, 1
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; CHECK-PWR8: blr
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}
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; 32 Bit Unsigned Version of the test.
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; The 32 bit examples work differently than the 8 and 16 bit versions of the
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; test. On Power 9 we have the mtvsrws instruction that does both the move to
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; register and the splat so it does not really test the newly implemented code.
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; On Power 9 for the 32 bit case we don't need the new simplification. It is
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; just here for completeness.
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; Function Attrs: norecurse nounwind readnone
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define <4 x i32> @splat_u32_plus(<4 x i32> %v, i32 zeroext %c) local_unnamed_addr {
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entry:
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%sext = shl i32 %c, 24
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%conv.i = ashr exact i32 %sext, 24
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%splat.splatinsert.i = insertelement <4 x i32> undef, i32 %conv.i, i32 0
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%splat.splat.i = shufflevector <4 x i32> %splat.splatinsert.i, <4 x i32> undef, <4 x i32> zeroinitializer
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%add = add <4 x i32> %splat.splat.i, %v
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ret <4 x i32> %add
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; CHECK-LABEL: splat_u32_plus
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; CHECK-NOT: xxswapd
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; CHECK: mtvsrws {{[0-9]+}}, {{[0-9]+}}
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; CHECK: blr
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; CHECK-PWR8-LABEL: splat_u32_plus
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; CHECK-PWR8-NOT: xxswapd
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; CHECK-PWR8: xxspltw {{[0-9]+}}, {{[0-9]+}}, 1
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; CHECK-PWR8: blr
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}
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