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[ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger.
The included test only checks for a compiler crash for now. Several people are facing this issue, so we first resolve the crash, and will increase shrinkwrap's coverage later in a follow-up patch. llvm-svn: 253718
This commit is contained in:
parent
8f65a2ac5e
commit
1e22479e47
@ -63,6 +63,7 @@
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/Passes.h"
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// To know about callee-saved.
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// To know about callee-saved.
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#include "llvm/CodeGen/RegisterClassInfo.h"
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#include "llvm/CodeGen/RegisterClassInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Debug.h"
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// To query the target about frame lowering.
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// To query the target about frame lowering.
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@ -130,15 +131,15 @@ class ShrinkWrap : public MachineFunctionPass {
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/// \brief Check if \p MI uses or defines a callee-saved register or
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/// \brief Check if \p MI uses or defines a callee-saved register or
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/// a frame index. If this is the case, this means \p MI must happen
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/// a frame index. If this is the case, this means \p MI must happen
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/// after Save and before Restore.
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/// after Save and before Restore.
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bool useOrDefCSROrFI(const MachineInstr &MI) const;
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bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS) const;
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const SetOfRegs &getCurrentCSRs() const {
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const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const {
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if (CurrentCSRs.empty()) {
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if (CurrentCSRs.empty()) {
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BitVector SavedRegs;
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BitVector SavedRegs;
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const TargetFrameLowering *TFI =
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const TargetFrameLowering *TFI =
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MachineFunc->getSubtarget().getFrameLowering();
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MachineFunc->getSubtarget().getFrameLowering();
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TFI->determineCalleeSaves(*MachineFunc, SavedRegs, nullptr);
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TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS);
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for (int Reg = SavedRegs.find_first(); Reg != -1;
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for (int Reg = SavedRegs.find_first(); Reg != -1;
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Reg = SavedRegs.find_next(Reg))
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Reg = SavedRegs.find_next(Reg))
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@ -152,7 +153,7 @@ class ShrinkWrap : public MachineFunctionPass {
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/// and Save and Restore still match the safe point definition.
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/// and Save and Restore still match the safe point definition.
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/// Such point may not exist and Save and/or Restore may be null after
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/// Such point may not exist and Save and/or Restore may be null after
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/// this call.
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/// this call.
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void updateSaveRestorePoints(MachineBasicBlock &MBB);
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void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
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/// \brief Initialize the pass for \p MF.
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/// \brief Initialize the pass for \p MF.
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void init(MachineFunction &MF) {
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void init(MachineFunction &MF) {
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@ -218,7 +219,8 @@ INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
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INITIALIZE_PASS_END(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false, false)
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INITIALIZE_PASS_END(ShrinkWrap, "shrink-wrap", "Shrink Wrap Pass", false, false)
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bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI) const {
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bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI,
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RegScavenger *RS) const {
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if (MI.getOpcode() == FrameSetupOpcode ||
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if (MI.getOpcode() == FrameSetupOpcode ||
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MI.getOpcode() == FrameDestroyOpcode) {
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MI.getOpcode() == FrameDestroyOpcode) {
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DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
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DEBUG(dbgs() << "Frame instruction: " << MI << '\n');
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@ -235,7 +237,7 @@ bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI) const {
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UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
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UseOrDefCSR = RCI.getLastCalleeSavedAlias(PhysReg);
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} else if (MO.isRegMask()) {
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} else if (MO.isRegMask()) {
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// Check if this regmask clobbers any of the CSRs.
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// Check if this regmask clobbers any of the CSRs.
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for (unsigned Reg : getCurrentCSRs()) {
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for (unsigned Reg : getCurrentCSRs(RS)) {
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if (MO.clobbersPhysReg(Reg)) {
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if (MO.clobbersPhysReg(Reg)) {
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UseOrDefCSR = true;
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UseOrDefCSR = true;
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break;
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break;
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@ -264,7 +266,8 @@ MachineBasicBlock *FindIDom(MachineBasicBlock &Block, ListOfBBs BBs,
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return IDom;
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return IDom;
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}
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}
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void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB) {
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void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB,
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RegScavenger *RS) {
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// Get rid of the easy cases first.
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// Get rid of the easy cases first.
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if (!Save)
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if (!Save)
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Save = &MBB;
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Save = &MBB;
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@ -285,7 +288,7 @@ void ShrinkWrap::updateSaveRestorePoints(MachineBasicBlock &MBB) {
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// terminator.
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// terminator.
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if (Restore == &MBB) {
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if (Restore == &MBB) {
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for (const MachineInstr &Terminator : MBB.terminators()) {
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for (const MachineInstr &Terminator : MBB.terminators()) {
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if (!useOrDefCSROrFI(Terminator))
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if (!useOrDefCSROrFI(Terminator, RS))
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continue;
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continue;
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// One of the terminator needs to happen before the restore point.
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// One of the terminator needs to happen before the restore point.
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if (MBB.succ_empty()) {
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if (MBB.succ_empty()) {
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@ -375,6 +378,10 @@ bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
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init(MF);
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init(MF);
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const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
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std::unique_ptr<RegScavenger> RS(
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TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr);
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for (MachineBasicBlock &MBB : MF) {
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for (MachineBasicBlock &MBB : MF) {
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DEBUG(dbgs() << "Look into: " << MBB.getNumber() << ' ' << MBB.getName()
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DEBUG(dbgs() << "Look into: " << MBB.getNumber() << ' ' << MBB.getName()
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<< '\n');
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<< '\n');
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@ -385,11 +392,11 @@ bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
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}
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}
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for (const MachineInstr &MI : MBB) {
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for (const MachineInstr &MI : MBB) {
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if (!useOrDefCSROrFI(MI))
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if (!useOrDefCSROrFI(MI, RS.get()))
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continue;
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continue;
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// Save (resp. restore) point must dominate (resp. post dominate)
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// Save (resp. restore) point must dominate (resp. post dominate)
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// MI. Look for the proper basic block for those.
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// MI. Look for the proper basic block for those.
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updateSaveRestorePoints(MBB);
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updateSaveRestorePoints(MBB, RS.get());
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// If we are at a point where we cannot improve the placement of
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// If we are at a point where we cannot improve the placement of
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// save/restore instructions, just give up.
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// save/restore instructions, just give up.
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if (!ArePointsInteresting()) {
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if (!ArePointsInteresting()) {
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@ -441,7 +448,7 @@ bool ShrinkWrap::runOnMachineFunction(MachineFunction &MF) {
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break;
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break;
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NewBB = Restore;
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NewBB = Restore;
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}
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}
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updateSaveRestorePoints(*NewBB);
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updateSaveRestorePoints(*NewBB, RS.get());
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} while (Save && Restore);
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} while (Save && Restore);
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if (!ArePointsInteresting()) {
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if (!ArePointsInteresting()) {
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184
test/CodeGen/AArch64/shrink-wrap.ll
Executable file
184
test/CodeGen/AArch64/shrink-wrap.ll
Executable file
@ -0,0 +1,184 @@
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; RUN: llc -mtriple=aarch64-linux-gnu -o - %s
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; Regression test for a crash in the ShrinkWrap pass not handling targets
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; requiring a register scavenger.
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%type1 = type { i32, i32, i32 }
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@g1 = external unnamed_addr global i32, align 4
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@g2 = external unnamed_addr global i1
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@g3 = external unnamed_addr global [144 x i32], align 4
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@g4 = external unnamed_addr constant [144 x i32], align 4
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@g5 = external unnamed_addr constant [144 x i32], align 4
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@g6 = external unnamed_addr constant [144 x i32], align 4
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@g7 = external unnamed_addr constant [144 x i32], align 4
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@g8 = external unnamed_addr constant [144 x i32], align 4
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@g9 = external unnamed_addr constant [144 x i32], align 4
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@g10 = external unnamed_addr constant [144 x i32], align 4
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@g11 = external unnamed_addr global i32, align 4
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@g12 = external unnamed_addr global [144 x [144 x i8]], align 1
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@g13 = external unnamed_addr global %type1*, align 8
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@g14 = external unnamed_addr global [144 x [144 x i8]], align 1
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@g15 = external unnamed_addr global [144 x [144 x i8]], align 1
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@g16 = external unnamed_addr global [144 x [144 x i8]], align 1
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@g17 = external unnamed_addr global [62 x i32], align 4
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@g18 = external unnamed_addr global i32, align 4
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@g19 = external unnamed_addr constant [144 x i32], align 4
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@g20 = external unnamed_addr global [144 x [144 x i8]], align 1
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@g21 = external unnamed_addr global i32, align 4
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declare fastcc i32 @foo()
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declare fastcc i32 @bar()
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define internal fastcc i32 @func(i32 %alpha, i32 %beta) {
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entry:
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%v1 = alloca [2 x [11 x i32]], align 4
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%v2 = alloca [11 x i32], align 16
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%v3 = alloca [11 x i32], align 16
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switch i32 undef, label %if.end.9 [
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i32 4, label %if.then.6
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i32 3, label %if.then.2
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]
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if.then.2:
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%call3 = tail call fastcc i32 @bar()
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br label %cleanup
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if.then.6:
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%call7 = tail call fastcc i32 @foo()
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unreachable
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if.end.9:
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%tmp = load i32, i32* @g1, align 4
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%rem.i = urem i32 %tmp, 1000000
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%idxprom.1.i = zext i32 %rem.i to i64
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%tmp1 = load %type1*, %type1** @g13, align 8
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%v4 = getelementptr inbounds %type1, %type1* %tmp1, i64 %idxprom.1.i, i32 0
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%.b = load i1, i1* @g2, align 1
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%v5 = select i1 %.b, i32 2, i32 0
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%tmp2 = load i32, i32* @g18, align 4
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%tmp3 = load i32, i32* @g11, align 4
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%idxprom58 = sext i32 %tmp3 to i64
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%tmp4 = load i32, i32* @g21, align 4
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%idxprom69 = sext i32 %tmp4 to i64
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br label %for.body
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for.body:
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%v6 = phi i32 [ 0, %if.end.9 ], [ %v7, %for.inc ]
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%a.0983 = phi i32 [ 1, %if.end.9 ], [ %a.1, %for.inc ]
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%arrayidx = getelementptr inbounds [62 x i32], [62 x i32]* @g17, i64 0, i64 undef
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%tmp5 = load i32, i32* %arrayidx, align 4
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br i1 undef, label %for.inc, label %if.else.51
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if.else.51:
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%idxprom53 = sext i32 %tmp5 to i64
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%arrayidx54 = getelementptr inbounds [144 x i32], [144 x i32]* @g3, i64 0, i64 %idxprom53
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%tmp6 = load i32, i32* %arrayidx54, align 4
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switch i32 %tmp6, label %for.inc [
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i32 1, label %block.bb
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i32 10, label %block.bb.159
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i32 7, label %block.bb.75
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i32 8, label %block.bb.87
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i32 9, label %block.bb.147
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i32 12, label %block.bb.111
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i32 3, label %block.bb.123
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i32 4, label %block.bb.135
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]
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block.bb:
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%arrayidx56 = getelementptr inbounds [144 x i32], [144 x i32]* @g6, i64 0, i64 %idxprom53
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%tmp7 = load i32, i32* %arrayidx56, align 4
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%shr = ashr i32 %tmp7, %v5
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%add57 = add nsw i32 %shr, 0
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%arrayidx61 = getelementptr inbounds [144 x [144 x i8]], [144 x [144 x i8]]* @g14, i64 0, i64 %idxprom53, i64 %idxprom58
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%tmp8 = load i8, i8* %arrayidx61, align 1
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%conv = zext i8 %tmp8 to i32
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%add62 = add nsw i32 %conv, %add57
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br label %for.inc
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block.bb.75:
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%arrayidx78 = getelementptr inbounds [144 x i32], [144 x i32]* @g10, i64 0, i64 %idxprom53
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%tmp9 = load i32, i32* %arrayidx78, align 4
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%shr79 = ashr i32 %tmp9, %v5
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%add80 = add nsw i32 %shr79, 0
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%add86 = add nsw i32 0, %add80
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br label %for.inc
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block.bb.87:
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%arrayidx90 = getelementptr inbounds [144 x i32], [144 x i32]* @g9, i64 0, i64 %idxprom53
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%tmp10 = load i32, i32* %arrayidx90, align 4
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%shr91 = ashr i32 %tmp10, 0
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%sub92 = sub nsw i32 0, %shr91
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%arrayidx96 = getelementptr inbounds [144 x [144 x i8]], [144 x [144 x i8]]* @g15, i64 0, i64 %idxprom53, i64 %idxprom69
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%tmp11 = load i8, i8* %arrayidx96, align 1
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%conv97 = zext i8 %tmp11 to i32
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%sub98 = sub nsw i32 %sub92, %conv97
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br label %for.inc
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block.bb.111:
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%arrayidx114 = getelementptr inbounds [144 x i32], [144 x i32]* @g19, i64 0, i64 %idxprom53
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%tmp12 = load i32, i32* %arrayidx114, align 4
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%shr115 = ashr i32 %tmp12, 0
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%sub116 = sub nsw i32 0, %shr115
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%arrayidx120 = getelementptr inbounds [144 x [144 x i8]], [144 x [144 x i8]]* @g12, i64 0, i64 %idxprom53, i64 %idxprom69
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%tmp13 = load i8, i8* %arrayidx120, align 1
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%conv121 = zext i8 %tmp13 to i32
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%sub122 = sub nsw i32 %sub116, %conv121
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br label %for.inc
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block.bb.123:
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%arrayidx126 = getelementptr inbounds [144 x i32], [144 x i32]* @g5, i64 0, i64 %idxprom53
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%tmp14 = load i32, i32* %arrayidx126, align 4
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%shr127 = ashr i32 %tmp14, %v5
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%add128 = add nsw i32 %shr127, 0
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%add134 = add nsw i32 0, %add128
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br label %for.inc
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block.bb.135:
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%arrayidx138 = getelementptr inbounds [144 x i32], [144 x i32]* @g4, i64 0, i64 %idxprom53
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%tmp15 = load i32, i32* %arrayidx138, align 4
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%shr139 = ashr i32 %tmp15, 0
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%sub140 = sub nsw i32 0, %shr139
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%arrayidx144 = getelementptr inbounds [144 x [144 x i8]], [144 x [144 x i8]]* @g20, i64 0, i64 %idxprom53, i64 %idxprom69
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%tmp16 = load i8, i8* %arrayidx144, align 1
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%conv145 = zext i8 %tmp16 to i32
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%sub146 = sub nsw i32 %sub140, %conv145
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br label %for.inc
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block.bb.147:
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%arrayidx150 = getelementptr inbounds [144 x i32], [144 x i32]* @g8, i64 0, i64 %idxprom53
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%tmp17 = load i32, i32* %arrayidx150, align 4
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%shr151 = ashr i32 %tmp17, %v5
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%add152 = add nsw i32 %shr151, 0
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%arrayidx156 = getelementptr inbounds [144 x [144 x i8]], [144 x [144 x i8]]* @g16, i64 0, i64 %idxprom53, i64 %idxprom58
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%tmp18 = load i8, i8* %arrayidx156, align 1
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%conv157 = zext i8 %tmp18 to i32
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%add158 = add nsw i32 %conv157, %add152
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br label %for.inc
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block.bb.159:
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%sub160 = add nsw i32 %v6, -450
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%arrayidx162 = getelementptr inbounds [144 x i32], [144 x i32]* @g7, i64 0, i64 %idxprom53
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%tmp19 = load i32, i32* %arrayidx162, align 4
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%shr163 = ashr i32 %tmp19, 0
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%sub164 = sub nsw i32 %sub160, %shr163
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%sub170 = sub nsw i32 %sub164, 0
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br label %for.inc
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for.inc:
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||||||
|
%v7 = phi i32 [ %v6, %for.body ], [ %v6, %if.else.51 ], [ %sub170, %block.bb.159 ], [ %add158, %block.bb.147 ], [ %sub146, %block.bb.135 ], [ %add134, %block.bb.123 ], [ %sub122, %block.bb.111 ], [ %sub98, %block.bb.87 ], [ %add86, %block.bb.75 ], [ %add62, %block.bb ]
|
||||||
|
%a.1 = phi i32 [ %a.0983, %for.body ], [ undef, %if.else.51 ], [ undef, %block.bb.159 ], [ undef, %block.bb.147 ], [ undef, %block.bb.135 ], [ undef, %block.bb.123 ], [ undef, %block.bb.111 ], [ undef, %block.bb.87 ], [ undef, %block.bb.75 ], [ undef, %block.bb ]
|
||||||
|
%cmp48 = icmp sgt i32 %a.1, %tmp2
|
||||||
|
br i1 %cmp48, label %for.end, label %for.body
|
||||||
|
|
||||||
|
for.end:
|
||||||
|
store i32 %tmp, i32* %v4, align 4
|
||||||
|
%hold_hash.i.7 = getelementptr inbounds %type1, %type1* %tmp1, i64 %idxprom.1.i, i32 1
|
||||||
|
store i32 0, i32* %hold_hash.i.7, align 4
|
||||||
|
br label %cleanup
|
||||||
|
|
||||||
|
cleanup:
|
||||||
|
%retval.0 = phi i32 [ %call3, %if.then.2 ], [ undef, %for.end ]
|
||||||
|
ret i32 %retval.0
|
||||||
|
}
|
Loading…
Reference in New Issue
Block a user